| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 72 level_drm->nblk_x = level_ws->nblk_x;
74 level_drm->pitch_bytes = level_ws->nblk_x * bpe;
84 level_ws->nblk_x = level_drm->nblk_x;
87 assert(level_drm->nblk_x * bpe == level_drm->pitch_bytes);
|
| /external/libdrm/radeon/ |
| radeon_surface.h | 75 uint32_t nblk_x; member in struct:radeon_surface_level
|
| radeon_surface.c | 176 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w;
181 if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) {
186 surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign);
191 surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;
585 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w;
590 if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) {
595 surflevel->nblk_x = ALIGN(surflevel->nblk_x, mtilew);
600 mtile_pr = surflevel->nblk_x / mtilew
[all...] |
| /external/mesa3d/src/amd/common/ |
| ac_surface.h | 77 unsigned nblk_x:15; member in struct:legacy_surf_level
|
| ac_surface.c | 289 AddrSurfInfoIn->basePitch = surf->u.legacy.stencil_level[0].nblk_x;
291 AddrSurfInfoIn->basePitch = surf->u.legacy.level[0].nblk_x;
308 surf_level->nblk_x = AddrSurfInfoOut->pitch;
754 if (surf->u.legacy.stencil_level[level].nblk_x !=
755 surf->u.legacy.level[level].nblk_x)
758 surf->u.legacy.level[level].nblk_x =
759 surf->u.legacy.stencil_level[level].nblk_x;
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| radeon_vce_50.c | 128 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
129 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
|
| radeon_vce_40_2_2.c | 91 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch
92 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch
321 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
322 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
|
| r600_texture.c | 202 *stride = rtex->surface.u.legacy.level[level].nblk_x *
215 rtex->surface.u.legacy.level[level].nblk_x +
312 surface->u.legacy.level[0].nblk_x = pitch;
345 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe;
754 stride = rtex->surface.u.legacy.level[0].nblk_x *
876 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;
881 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x;
[all...] |
| radeon_vce.c | 226 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128);
463 align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
|
| radeon_vce_52.c | 183 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch
184 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch
259 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
260 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
|
| radeon_vcn_enc.c | 279 align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
|
| radeon_uvd.c | [all...] |
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_dma.c | 168 slice_tile_max = (rtiled->surface.u.legacy.level[tiled_lvl].nblk_x *
271 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe;
272 src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.bpe;
|
| cik_sdma.c | 166 unsigned dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x;
167 unsigned src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x;
|
| si_state.c | [all...] |
| si_descriptors.c | 401 unsigned pitch = base_level_info->nblk_x * block_width;
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/ |
| radeon_vce.c | 230 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128);
453 cpb_size = align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
|
| r600_texture.c | 179 *stride = rtex->surface.u.legacy.level[level].nblk_x *
192 rtex->surface.u.legacy.level[level].nblk_x +
255 pitch_in_bytes_override != surface->u.legacy.level[0].nblk_x * bpe) {
259 surface->u.legacy.level[0].nblk_x = pitch_in_bytes_override / bpe;
290 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe;
504 stride = rtex->surface.u.legacy.level[0].nblk_x *
627 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;
632 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x;
848 "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
855 rtex->surface.u.legacy.level[i].nblk_x,
[all...] |
| r600_state.c | 727 pitch = tmp->surface.u.legacy.level[offset_level].nblk_x * util_format_get_blockwidth(state->format);
832 pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1;
833 slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64;
[all...] |
| evergreen_state.c | 782 pitch = surflevel[base_level].nblk_x * util_format_get_blockwidth(params->pipe_format);
[all...] |
| radeon_uvd.c | [all...] |
| /external/mesa3d/src/amd/vulkan/ |
| radv_image.c | 312 unsigned pitch = base_level_info->nblk_x * block_width;
644 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe;
697 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;
702 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x;
[all...] |
| radv_device.c | [all...] |
