| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 73 level_drm->nblk_y = level_ws->nblk_y;
85 level_ws->nblk_y = level_drm->nblk_y;
|
| /external/libdrm/radeon/ |
| radeon_surface.h | 76 uint32_t nblk_y; member in struct:radeon_surface_level
|
| radeon_surface.c | 177 surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h;
181 if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) {
187 surflevel->nblk_y = ALIGN(surflevel->nblk_y, yalign);
192 surflevel->slice_size = (uint64_t)surflevel->pitch_bytes * surflevel->nblk_y;
586 surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h;
590 if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) {
596 surflevel->nblk_y = ALIGN(surflevel->nblk_y, mtileh);
602 mtile_ps = (mtile_pr * surflevel->nblk_y) / mtileh
[all...] |
| /external/mesa3d/src/amd/common/ |
| ac_surface.h | 78 unsigned nblk_y:15; member in struct:legacy_surf_level
|
| ac_surface.c | 309 surf_level->nblk_y = AddrSurfInfoOut->height;
[all...] |
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_dma.c | 169 rtiled->surface.u.legacy.level[tiled_lvl].nblk_y) / (8*8) - 1;
175 height = rtiled->surface.u.legacy.level[tiled_lvl].nblk_y;
283 rsrc->surface.u.legacy.level[src_level].nblk_y !=
284 rdst->surface.u.legacy.level[dst_level].nblk_y) {
|
| si_state.c | [all...] |
| /external/mesa3d/src/gallium/drivers/r600/ |
| radeon_vce.c | 231 vpitch = align(enc->luma->u.legacy.level[0].nblk_y, 16);
454 align(tmp_surf->u.legacy.level[0].nblk_y, 32);
|
| r600_texture.c | 261 ((uint64_t)pitch_in_bytes_override * surface->u.legacy.level[0].nblk_y) / 4;
627 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;
848 "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
856 rtex->surface.u.legacy.level[i].nblk_y,
866 "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
874 rtex->surface.u.legacy.stencil_level[i].nblk_y,
[all...] |
| r600_state.c | 833 slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64;
[all...] |
| evergreen_state.c | [all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| radeon_vce_50.c | 127 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
|
| radeon_vce.c | 227 vpitch = align(enc->luma->u.legacy.level[0].nblk_y, 16);
464 align(tmp_surf->u.legacy.level[0].nblk_y, 32) :
|
| radeon_vce_40_2_2.c | 93 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16) / 8); // encRefYHeightInQw
320 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
|
| radeon_vcn_enc.c | 280 align(tmp_surf->u.legacy.level[0].nblk_y, 32) :
|
| r600_texture.c | 314 ((uint64_t)pitch * surface->u.legacy.level[0].nblk_y * bpe) / 4;
876 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;
[all...] |
| radeon_vce_52.c | 185 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16) / 8); // encRefYHeightInQw
258 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
|
| /external/mesa3d/src/amd/vulkan/ |
| radv_device.c | [all...] |
| radv_image.c | 697 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;
[all...] |
