/external/mesa3d/src/compiler/nir/ |
nir_lower_atomics_to_ssbo.c | 108 nir_intrinsic_instr *new_instr = local 118 new_instr->src[0] = nir_src_for_ssa(buffer); 119 nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr); 120 new_instr->src[2] = nir_src_for_ssa(temp); 126 new_instr->src[0] = nir_src_for_ssa(buffer); 127 nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr); 128 new_instr->src[2] = nir_src_for_ssa(temp); 132 new_instr->src[0] = nir_src_for_ssa(buffer) [all...] |
nir_lower_atomics.c | 101 nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op); local 102 nir_intrinsic_set_base(new_instr, 151 new_instr->src[0].is_ssa = true; 152 new_instr->src[0].ssa = offset_def; 158 nir_src_copy(&new_instr->src[i + 1], &instr->src[i], new_instr); 161 nir_ssa_dest_init(&new_instr->instr, &new_instr->dest, 164 nir_src_for_ssa(&new_instr->dest.ssa)); 166 nir_dest_copy(&new_instr->dest, &instr->dest, mem_ctx) [all...] |
nir_opt_constant_folding.c | 99 nir_load_const_instr *new_instr = local 104 new_instr->value = dest; 106 nir_instr_insert_before(&instr->instr, &new_instr->instr); 109 nir_src_for_ssa(&new_instr->def));
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/external/tensorflow/tensorflow/compiler/xla/service/ |
hlo_get_dimension_size_rewriter.cc | 50 HloInstruction* new_instr = computation->AddInstruction( local 52 TF_RETURN_IF_ERROR(instr->ReplaceAllUsesWith(new_instr));
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while_loop_constant_sinking.cc | 24 // Replaces all uses of old_instr with new_instr except the use at 29 HloInstruction* old_instr, HloInstruction* new_instr, 41 TF_RETURN_IF_ERROR(user->ReplaceOperandWith(i, new_instr));
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hlo_computation.cc | 157 HloInstruction* new_instr = local 160 TF_RETURN_IF_ERROR(param_instruction->ReplaceAllUsesWith(new_instr)); 161 param_instructions_[param_no] = new_instr; 183 HloInstruction* new_instr = AddInstructionInternal( local 186 TF_RETURN_IF_ERROR(param_instruction->ReplaceAllUsesWith(new_instr)); 187 param_instructions_[param_no] = new_instr; 966 HloInstruction* new_instr = replace(instr.get()); local 1025 HloInstruction* new_instr = context->GetInstruction(instr); local [all...] |
hlo_instructions.cc | [all...] |
/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
ir3_sched.c | 553 struct ir3_instruction *new_instr = NULL; local 561 new_instr = split_addr(ctx); 563 new_instr = split_pred(ctx); 570 if (new_instr) { 576 ir3_insert_by_depth(new_instr, &ctx->depth_list); 580 new_instr->block = block;
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ir3.c | 797 struct ir3_instruction *new_instr = instr_create(instr->block, local 802 regs = new_instr->regs; 803 *new_instr = *instr; 804 new_instr->regs = regs; 806 insert_instr(instr->block, new_instr); 809 new_instr->regs_count = 0; 813 ir3_reg_create(new_instr, reg->num, reg->flags); 817 return new_instr;
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/external/tensorflow/tensorflow/compiler/xla/service/gpu/ |
cudnn_conv_pad_for_tensor_cores.cc | 89 auto add = [&](std::unique_ptr<HloInstruction> new_instr) { 90 return conv->parent()->AddInstruction(std::move(new_instr));
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cudnn_fused_conv_rewriter.cc | 267 TF_ASSIGN_OR_RETURN(auto new_instr, TryRewriteToCudnnForwardRelu(match)); 268 replacements.push_back({match.maximum, std::move(new_instr)});
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/external/v8/src/arm64/ |
instructions-arm64.h | 85 V8_INLINE void SetInstructionBits(Instr new_instr) { 86 *reinterpret_cast<Instr*>(this) = new_instr;
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/external/vixl/src/aarch64/ |
instructions-aarch64.h | 163 void SetInstructionBits(Instr new_instr) { 164 *(reinterpret_cast<Instr*>(this)) = new_instr;
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