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    Searched refs:pad_ctrl (Results 1 - 7 of 7) sorted by null

  /external/u-boot/arch/arm/mach-imx/
iomux-v3.c 31 u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; local
35 if (pad_ctrl & PAD_CTL_LVE) {
36 pad_ctrl &= ~PAD_CTL_LVE;
37 pad_ctrl |= PAD_CTL_LVE_BIT;
69 if (!(pad_ctrl & NO_PAD_CTRL))
70 __raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl,
73 if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
74 __raw_writel(pad_ctrl, base + pad_ctrl_ofs);
76 else if ((pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
  /external/u-boot/arch/arm/mach-imx/mx7ulp/
iomux.c 31 u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; local
33 debug("[PAD CFG] = 0x%16llX \r\n\tmux_ctl = 0x%X(0x%X) sel_input = 0x%X(0x%X) pad_ctrl = 0x%X(0x%X)\r\n",
35 pad_ctrl_ofs, pad_ctrl);
51 if (!(pad_ctrl & NO_PAD_CTRL))
54 (pad_ctrl & (~IOMUXC_PCR_MUX_ALT_MASK)),
  /external/u-boot/arch/arm/include/asm/arch-mx7ulp/
iomux.h 40 * PAD_CTRL + NO_PAD_CTRL: 42..60 (19)
62 sel_input, pad_ctrl) \
65 ((iomux_cfg_t)(pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \
  /external/u-boot/drivers/ddr/microchip/
ddr2_regs.h 104 u32 pad_ctrl; member in struct:ddr2_phy_regs
ddr2.c 35 writel(pad_ctl, &ddr2_phy->pad_ctrl);
  /external/u-boot/arch/arm/include/asm/mach-imx/
iomux-v3.h 42 * PAD_CTRL + NO_PAD_CTRL: 42..59 (18)
69 sel_input, pad_ctrl) \
73 ((iomux_v3_cfg_t)(pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \
  /external/u-boot/drivers/video/tegra124/
sor.c 889 u32 pad_ctrl = 0; local
894 pad_ctrl = DP_PADCTL_PD_TXD_0_NO |
900 pad_ctrl = DP_PADCTL_PD_TXD_0_NO |
906 pad_ctrl = DP_PADCTL_PD_TXD_0_NO |
916 pad_ctrl |= DP_PADCTL_PAD_CAL_PD_POWERDOWN;
917 tegra_sor_writel(sor, DP_PADCTL(sor->portnum), pad_ctrl);

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