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    Searched refs:pll_stable_status (Results 1 - 4 of 4) sorted by null

  /external/u-boot/arch/arm/mach-sunxi/
clock_sun8i_a83t.c 28 while (!(readl(&ccm->pll_stable_status) & (1 << 8))) {}
40 while (!(readl(&ccm->pll_stable_status) & (1 << 6))) {}
91 while (!(readl(&ccm->pll_stable_status) & 0x01)) {}
96 while (!(readl(&ccm->pll_stable_status) & 0x02)) {}
clock_sun9i.c 103 * instead of the PLL_STABLE_STATUS register.
142 do { } while (!(readl(&ccm->pll_stable_status) & PLL_DDR_STATUS));
  /external/u-boot/arch/arm/include/asm/arch-sunxi/
clock_sun8i_a83t.h 93 u32 pll_stable_status; /* 0x20c PLL stable status register */ member in struct:sunxi_ccm_reg
clock_sun9i.h 40 u32 pll_stable_status; /* 0x9c */ member in struct:sunxi_ccm_reg

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