/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
INVPCID-64.s | 3 // CHECK: invpcid 485498096, %r15 5 invpcid 485498096, %r15 7 // CHECK: invpcid 64(%rdx), %r15 9 invpcid 64(%rdx), %r15 11 // CHECK: invpcid 64(%rdx,%rax,4), %r15 13 invpcid 64(%rdx,%rax,4), %r15 15 // CHECK: invpcid -64(%rdx,%rax,4), %r15 17 invpcid -64(%rdx,%rax,4), %r15 19 // CHECK: invpcid 64(%rdx,%rax), %r15 21 invpcid 64(%rdx,%rax), %r15 [all...] |
BMI2-64.s | 31 // CHECK: bzhiq %r15, 485498096, %r15 33 bzhiq %r15, 485498096, %r15 35 // CHECK: bzhiq %r15, 64(%rdx), %r15 37 bzhiq %r15, 64(%rdx), %r15 39 // CHECK: bzhiq %r15, 64(%rdx,%rax,4), %r15 [all...] |
VTX-64.s | 3 // CHECK: invept 485498096, %r15 5 invept 485498096, %r15 7 // CHECK: invept 64(%rdx), %r15 9 invept 64(%rdx), %r15 11 // CHECK: invept 64(%rdx,%rax,4), %r15 13 invept 64(%rdx,%rax,4), %r15 15 // CHECK: invept -64(%rdx,%rax,4), %r15 17 invept -64(%rdx,%rax,4), %r15 19 // CHECK: invept 64(%rdx,%rax), %r15 21 invept 64(%rdx,%rax), %r15 [all...] |
BMI1-64.s | 31 // CHECK: andnq 485498096, %r15, %r15 33 andnq 485498096, %r15, %r15 35 // CHECK: andnq 64(%rdx), %r15, %r15 37 andnq 64(%rdx), %r15, %r15 39 // CHECK: andnq 64(%rdx,%rax,4), %r15, %r15 [all...] |
CET-64.s | 39 // CHECK: incsspq %r15 41 incsspq %r15 47 // CHECK: rdsspq %r15 49 rdsspq %r15 107 // CHECK: wrssq %r15, 485498096 109 wrssq %r15, 485498096 111 // CHECK: wrssq %r15, 64(%rdx) 113 wrssq %r15, 64(%rdx) 115 // CHECK: wrssq %r15, 64(%rdx,%rax,4) 117 wrssq %r15, 64(%rdx,%rax,4) [all...] |
cet-encoding.s | 7 // CHECK: incsspq %r15 9 incsspq %r15 11 // CHECK: rdsspq %r15 13 rdsspq %r15 47 // CHECK: wrssq %r15, 485498096 49 wrssq %r15, 485498096 51 // CHECK: wrssq %r15, (%rdx) 53 wrssq %r15, (%rdx) 55 // CHECK: wrssq %r15, 64(%rdx) 57 wrssq %r15, 64(%rdx [all...] |
/external/vixl/test/aarch32/ |
test-macro-assembler-cond-rd-rn-pc-a32.cc | 87 const TestData kTests[] = {{{eq, r0, r15}, "eq, r0, r15", "eq_r0_r15"}, 88 {{eq, r1, r15}, "eq, r1, r15", "eq_r1_r15"}, 89 {{eq, r2, r15}, "eq, r2, r15", "eq_r2_r15"}, 90 {{eq, r3, r15}, "eq, r3, r15", "eq_r3_r15"}, 91 {{eq, r4, r15}, "eq, r4, r15", "eq_r4_r15"} [all...] |
test-assembler-negative-cond-rd-rn-operand-rm-shift-rs-a32.cc | 106 const TestData kTests[] = {{{cs, r13, r3, r15, LSR, r1}, 107 "cs, r13, r3, r15, LSR, r1", 109 {{cc, r14, r0, r15, LSR, r7}, 110 "cc, r14, r0, r15, LSR, r7", 112 {{gt, r15, r8, r15, LSL, r10}, 113 "gt, r15, r8, r15, LSL, r10", 115 {{vc, r10, r14, r15, LSL, r1}, 116 "vc, r10, r14, r15, LSL, r1" [all...] |
/external/linux-kselftest/tools/testing/selftests/powerpc/switch_endian/ |
switch_endian_test.S | 17 ld r15, pattern@TOC(%r2) 25 mr r3, r15 26 addi r4, r15, 4 28 addi r5, r15, 32 31 addi r5, r15, 5 32 addi r6, r15, 6 33 addi r7, r15, 7 34 addi r8, r15, 8 38 addi r13, r15, 13 39 addi r14, r15, 1 [all...] |
check.S | 8 * r15: pattern to check registers against. 13 mr r9,r15 16 addi r9,r15,4 # check r4 24 addi r9,r15,34 26 addi r9,r15,32 # check LR 30 addi r9,r15,5 # check r5 33 addi r9,r15,6 # check r6 36 addi r9,r15,7 # check r7 39 addi r9,r15,8 # check r8 42 addi r9,r15,13 # check r1 [all...] |
/external/llvm/test/DebugInfo/SystemZ/ |
eh_frame.s | 10 stmg %r13, %r15, 104(%r15) 13 .cfi_offset %r15, -40 14 aghi %r15, -224 16 std %f8, 160(%r15) 17 std %f9, 168(%r15) 18 std %f10, 176(%r15) 19 std %f11, 184(%r15) 20 std %f12, 192(%r15) 21 std %f13, 200(%r15) [all...] |
/external/llvm/test/MC/X86/ |
intel-syntax-x86-64-avx.s | 19 // CHECK: vgatherdps xmm10, xmmword ptr [r15 + 2*xmm9], xmm8 21 vgatherdps xmm10, xmmword ptr [r15 + 2*xmm9], xmm8 23 // CHECK: vgatherqps xmm10, qword ptr [r15 + 2*xmm9], xmm8 25 vgatherqps xmm10, qword ptr [r15 + 2*xmm9], xmm8 27 // CHECK: vgatherdps ymm10, ymmword ptr [r15 + 2*ymm9], ymm8 29 vgatherdps ymm10, ymmword ptr [r15 + 2*ymm9], ymm8 31 // CHECK: vgatherqps xmm10, xmmword ptr [r15 + 2*ymm9], xmm8 33 vgatherqps xmm10, xmmword ptr [r15 + 2*ymm9], xmm8 51 // CHECK: vpgatherdd xmm10, xmmword ptr [r15 + 2*xmm9], xmm8 53 vpgatherdd xmm10, xmmword ptr [r15 + 2*xmm9], xmm8 [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/SystemZ/ |
eh_frame.s | 10 stmg %r13, %r15, 104(%r15) 13 .cfi_offset %r15, -40 14 aghi %r15, -224 16 std %f8, 160(%r15) 17 std %f9, 168(%r15) 18 std %f10, 176(%r15) 19 std %f11, 184(%r15) 20 std %f12, 192(%r15) 21 std %f13, 200(%r15) [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/ |
inst-adc.s | 6 adc r0, r15 7 adc r15, r0 11 ; CHECK: adc r0, r15 ; encoding: [0x0f,0x1c] 12 ; CHECK: adc r15, r0 ; encoding: [0xf0,0x1c]
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inst-add.s | 6 add r0, r15 7 add r15, r0 11 ; CHECK: add r0, r15 ; encoding: [0x0f,0x0c] 12 ; CHECK: add r15, r0 ; encoding: [0xf0,0x0c]
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inst-and.s | 6 and r0, r15 7 and r15, r0 11 ; CHECK: and r0, r15 ; encoding: [0x0f,0x20] 12 ; CHECK: and r15, r0 ; encoding: [0xf0,0x20]
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inst-eor.s | 6 eor r0, r15 7 eor r15, r0 11 ; CHECK: eor r0, r15 ; encoding: [0x0f,0x24] 12 ; CHECK: eor r15, r0 ; encoding: [0xf0,0x24]
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inst-mul.s | 5 mul r0, r15 6 mul r15, r0 10 ; CHECK: mul r0, r15 ; encoding: [0x0f,0x9c] 11 ; CHECK: mul r15, r0 ; encoding: [0xf0,0x9c]
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inst-or.s | 5 or r0, r15 6 or r15, r0 10 ; CHECK: or r0, r15 ; encoding: [0x0f,0x28] 11 ; CHECK: or r15, r0 ; encoding: [0xf0,0x28]
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inst-sbc.s | 6 sbc r0, r15 7 sbc r15, r0 11 ; CHECK: sbc r0, r15 ; encoding: [0x0f,0x08] 12 ; CHECK: sbc r15, r0 ; encoding: [0xf0,0x08]
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inst-sub.s | 5 sub r0, r15 6 sub r15, r0 10 ; CHECK: sub r0, r15 ; encoding: [0x0f,0x18] 11 ; CHECK: sub r15, r0 ; encoding: [0xf0,0x18]
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/external/libunwind/src/ia64/ |
longjmp.S | 33 .save rp, r15 35 mov rp = r15
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/external/strace/linux/ia64/ |
raw_syscall.h | 38 register kernel_ulong_t r15 __asm__("r15") = nr; 42 : "=r"(r8), "=r"(r10), "+r"(r15)
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/external/u-boot/arch/powerpc/lib/ |
ticks.S | 37 stw r15, 8(r1) 43 addze r15, r3 /* and end time upper */ 48 subfe. r3, r3, r15 51 lwz r15, 8(r1) /* restore saved registers */
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/bionic/libc/arch-arm/bionic/ |
__restore.S | 46 .save {r0-r15} 56 .save {r0-r15}
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