| /external/llvm/test/MC/Lanai/ |
| v11.s | 3 add %r17, 0, %r21
5 add %r17, 0x00001234, %r21
7 add %r17, 0x12340000, %r21
9 add.f %r17, 0, %r21
11 add.f %r17, 0x00001234, %r21
13 add.f %r17, 0x12340000, %r21
15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r2
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Lanai/ |
| v11.s | 3 add %r17, 0, %r21
5 add %r17, 0x00001234, %r21
7 add %r17, 0x12340000, %r21
9 add.f %r17, 0, %r21
11 add.f %r17, 0x00001234, %r21
13 add.f %r17, 0x12340000, %r21
15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r2
[all...] |
| /external/llvm/test/MC/Hexagon/ |
| duplex-registers.s | 5 r16 = memuh(r17 + #0)
10 # CHECK: r16 = memuh(r17 + #0);{{ *}}r18 = memuh(r19 + #0)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/ |
| duplex-registers.s | 5 r16 = memuh(r17 + #0)
10 # CHECK: r16 = memuh(r17+#0);{{ *}}r18 = memuh(r19+#0)
|
| store-GPRel.s | 21 #CHECK: 4eb3e2fc memb(gp+#59388) = r17.new
22 { r17 = add(r26,r18)
23 memb(gp+#59388) = r17.new }
24 #CHECK: 4eb3e2fc memb(gp+#59388) = r17.new
25 { r17 = add(r26,r18)
26 memb(#59388) = r17.new }
|
| guest.s | 49 r17=g0
51 memb(r11+#-478)=r17.new
53 # CHECK: { r17 = gelr
56 # CHECK: memb(r11+#-478) = r17.new }
60 r17=gpmucnt2
62 memb(r11+#-478)=r17.new
64 # CHECK: { r17 = gpmucnt2
67 # CHECK: memb(r11+#-478) = r17.new }
|
| reg_altnames.s | 4 r17 = xor(r21, lr) define
|
| v62a.s | 9 r19:18,p3=vminub(r17:16, r15:14)
10 # CHECK: eaeed072 { r19:18,p3 = vminub(r17:16,r15:14)
|
| /external/libunwind/src/ia64/ |
| setjmp.S | 40 adds r17 = JB_BSP*8, r32
44 st8 [r17] = r2 // jmp_buf[JB_BSP] = bsp
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/ |
| inst-cbr.s | 6 cbr r17, 208
11 ; CHECK: cbr r17, 208 ; encoding: [0x1f,0x72]
|
| inst-com.s | 7 com r17
12 ; CHECK: com r17 ; encoding: [0x10,0x95]
|
| inst-fmul.s | 7 fmul r19, r17
12 ; CHECK: fmul r19, r17 ; encoding: [0x39,0x03]
|
| inst-fmuls.s | 7 fmuls r19, r17
12 ; CHECK: fmuls r19, r17 ; encoding: [0xb1,0x03]
|
| inst-fmulsu.s | 7 fmulsu r19, r17
12 ; CHECK: fmulsu r19, r17 ; encoding: [0xb9,0x03]
|
| inst-muls.s | 7 muls r19, r17
12 ; CHECK: muls r19, r17 ; encoding: [0x31,0x02]
|
| inst-mulsu.s | 7 mulsu r19, r17
12 ; CHECK: mulsu r19, r17 ; encoding: [0x31,0x03]
|
| inst-ld.s | 9 ld r17, X
20 ld r17, X+
31 ld r17, -X
43 ; CHECK: ld r17, X ; encoding: [0x1c,0x91]
55 ; CHECK: ld r17, X+ ; encoding: [0x1d,0x91]
67 ; CHECK: ld r17, -X ; encoding: [0x1e,0x91]
|
| inst-st.s | 8 st X, r17
19 st X+, r17
30 st -X, r17
41 ; CHECK: st X, r17 ; encoding: [0x1c,0x93]
53 ; CHECK: st X+, r17 ; encoding: [0x1d,0x93]
65 ; CHECK: st -X, r17 ; encoding: [0x1e,0x93]
|
| inst-ori.s | 6 ori r17, 208
13 ; CHECK: ori r17, 208 ; encoding: [0x10,0x6d]
|
| inst-sbci.s | 6 sbci r17, 21
12 ; CHECK: sbci r17, 21 ; encoding: [0x15,0x41]
|
| inst-sbr.s | 5 sbr r17, 208
12 ; CHECK: sbr r17, 208 ; encoding: [0x10,0x6d]
|
| /external/libffi/src/ia64/ |
| unix.S | 112 ld8 r17 = [r18]
115 add r17 = r17, r18
117 mov b6 = r17
184 add r17 = 16, sp
190 (p7) st8 [r17] = r10
306 add r17 = 16 + 8*16 + 16, sp
309 stf.spill [r17] = f9, 32
313 stf.spill [r17] = f11, 32
316 stf.spill [r17] = f13, 3
[all...] |
| /external/python/cpython2/Modules/_ctypes/libffi/src/ia64/ |
| unix.S | 112 ld8 r17 = [r18]
115 add r17 = r17, r18
117 mov b6 = r17
184 add r17 = 16, sp
190 (p7) st8 [r17] = r10
306 add r17 = 16 + 8*16 + 16, sp
309 stf.spill [r17] = f9, 32
313 stf.spill [r17] = f11, 32
316 stf.spill [r17] = f13, 3
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ipf/ |
| SwitchStack.s | 28 mov r17 = in1
45 mov out0 = r17
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ipf/ |
| SwitchStack.s | 27 mov r17 = in1
46 mov out0 = r17
|
