| /external/llvm/test/MC/Hexagon/ |
| duplex-registers.s | 6 r18 = memuh(r19 + #0) define
10 # CHECK: r16 = memuh(r17 + #0);{{ *}}r18 = memuh(r19 + #0)
|
| asmMap.s | 29 #CHECK: 457fc012 { if (!p0) r18 = memuh(r31{{ *}}+{{ *}}#0)
30 if (!p0) r18=memuh(r31)
149 #CHECK: 3e1ec032 { memb(r30{{ *}}+{{ *}}#0) {{ *}}-={{ *}} r18
150 memb(r30)-=r18
233 #CHECK: 4312c801 if (p1.new) r1 = memb(r18{{ *}}+{{ *}}#0)
235 if (p1.new) r1=memb(r18)
283 p1=cmp.eq(r18,##1159699785)
341 #CHECK: 4692df01 if (!p1.new) memw(r18{{ *}}+{{ *}}#0) = r31
343 if (!p1.new) memw(r18)=r31
350 p2=cmp.eq(r18,##1895120239
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/ |
| duplex-registers.s | 6 r18 = memuh(r19 + #0) define
10 # CHECK: r16 = memuh(r17+#0);{{ *}}r18 = memuh(r19+#0)
|
| load-GPRel.s | 10 #CHECK: 4d1ac4d2 { r18 = memb(gp+#46118) }
11 r18 = memb(gp+#46118) define
12 #CHECK: 4d1ac4d2 { r18 = memb(gp+#46118) }
13 r18 = memb(#46118) define
15 #CHECK: 4d81f772 { r18 = memw(gp+#134892) }
16 r18 = memw(gp+#134892) define
17 #CHECK: 4d81f772 { r18 = memw(gp+#134892) }
18 r18 = memw(#134892) define
|
| store-GPRel.s | 14 { r6 = add(r18,r13)
18 { r6 = add(r18,r13)
22 { r17 = add(r26,r18)
25 { r17 = add(r26,r18)
|
| asmMap.s | 29 #CHECK: 457fc012 { if (!p0) r18 = memuh(r31+#0)
30 if (!p0) r18=memuh(r31)
149 #CHECK: 3e1ec032 { memb(r30+#0) -= r18
150 memb(r30)-=r18
233 #CHECK: 4312c801 if (p1.new) r1 = memb(r18+#0)
235 if (p1.new) r1=memb(r18)
283 p1=cmp.eq(r18,##1159699785)
341 #CHECK: 4692df01 if (!p1.new) memw(r18+#0) = r31
343 if (!p1.new) memw(r18)=r31
350 p2=cmp.eq(r18,##1895120239
[all...] |
| /external/llvm/test/MC/Lanai/ |
| v11.s | 15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r21
43 and %r17, %r18, %r21
45 and.f %r17, %r18, %r21
145 ld %r18[%r17], %r21
147 uld %r18[%r17], %r21
221 ld %r18[*%r17], %r21
223 uld %r18[*%r17], %r2
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Lanai/ |
| v11.s | 15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r21
43 and %r17, %r18, %r21
45 and.f %r17, %r18, %r21
145 ld %r18[%r17], %r21
147 uld %r18[%r17], %r21
221 ld %r18[*%r17], %r21
223 uld %r18[*%r17], %r2
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ipf/ |
| SwitchStack.s | 29 mov r18 = in2
46 mov out1 = r18
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ipf/ |
| SwitchStack.s | 28 mov r18 = in2
47 mov out1 = r18
|
| /external/u-boot/arch/arc/include/asm/ |
| ptrace.h | 26 long r18; member in struct:pt_regs
|
| /external/libffi/src/or1k/ |
| sysv.S | 49 l.sw -20(r1), r18
56 l.ori r18, r6, 0x0 /* save ret address */
90 l.sw 4(r18), r12
93 l.sw 0(r18), r11
102 l.lwz r18, -20(r1)
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/stringloops/asm/ |
| ppc_asm.h | 19 #define R18 r18
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Pei/PeiLib/Ipf/ |
| SwitchStack.s | 108 mov r18 = RSC_KERNEL_LAZ // RSC enabled, Lazy mode
110 mov ar.rsc = r18 // turn rse on, in kernel mode
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Ipf/ |
| IpfThunk.s | 118 mov r18 = ip;;
119 adds r18 = (sale_ip1y - sale_ip1x),r18;;
120 sub r18 = r18,r2;; // return address - CS base
121 add r18 = r18,sp;; // adjustment for stack
122 shl r18 = r18,32;;
124 or r18 = r18,r19;;
[all...] |
| /external/libffi/src/ia64/ |
| unix.S | 105 addl r18 = @ltoffx(.Lst_table), gp
107 ld8.mov r18 = [r18], .Lst_table
110 shladd r18 = r16, 3, r18
112 ld8 r17 = [r18]
115 add r17 = r17, r18
185 add r18 = 24, sp
191 (p8) st8 [r18] = r11
352 addl r18 = @ltoffx(.Lld_table), g
[all...] |
| /external/libunwind/src/ia64/ |
| ucontext_i.h | 55 #define rB5 r18
|
| Ginstall_cursor.S | 48 the exception-arguments (r15-r18) are restored. */
69 ld8 r18 = [r3], 2*LOC_SIZE // r18 = loc[IA64_REG_FR18]
80 and r18 = -4, r18
87 ldf.fill f18 = [r18] // f18 restored (don't touch no more)
169 ld8 r18 = [r2], (B5_LOC_OFF - B3_LOC_OFF) // r18 = b3_loc
181 and r18 = -4, r18
[all...] |
| /external/linux-kselftest/tools/testing/selftests/powerpc/copyloops/asm/ |
| ppc_asm.h | 14 #define R18 r18
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/ia64/ |
| unix.S | 105 addl r18 = @ltoffx(.Lst_table), gp
107 ld8.mov r18 = [r18], .Lst_table
110 shladd r18 = r16, 3, r18
112 ld8 r17 = [r18]
115 add r17 = r17, r18
185 add r18 = 24, sp
191 (p8) st8 [r18] = r11
352 addl r18 = @ltoffx(.Lld_table), g
[all...] |
| /external/libunwind/tests/ |
| ia64-test-stack-asm.S | 45 alloc r18 = ar.pfs, 0, 0, 0, 0 // read ar.pfs
67 st8 [r3] = r18, (SAVED_BSP_OFF - SAVED_PFS_OFF)
71 mov r18 = ar.rnat
80 st8 [r3] = r18
106 ld8 r18 = [r3], (SAVED_RNAT_OFF-SAVED_PFS_OFF);; // saved pfs
112 mov ar.pfs = r18
|
| ia64-test-rbs-asm.S | 46 alloc r18 = ar.pfs, 2, (n)-2, 2, 0;/* read ar.pfs */ \
74 st8 [r3] = r18, (SAVED_BSP_OFF - SAVED_PFS_OFF); \
77 mov r18 = ar.rnat; \
87 st8 [r3] = r18; \
100 ld8 r18 = [r3], (SAVED_RNAT_OFF-SAVED_PFS_OFF);;/* saved pfs */ \
105 mov ar.pfs = r18; \
188 mov r18 = in1
220 mov in1 = r18
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| gpr_asm.h | 29 std r18,(top_pos - 104)(%r1); \
49 ld r18,(top_pos - 104)(%r1); \
78 ld r18,32(r3) variable
|
| /external/u-boot/arch/microblaze/cpu/ |
| irq.S | 30 swi r18, r1, 68
59 lwi r18, r1, 68
|
| /external/compiler-rt/lib/tsan/rtl/ |
| tsan_ppc_regs.h | 19 #define r18 18 macro
|
