| /art/runtime/interpreter/mterp/arm64/ |
| floating_point.S | 97 %def funopNarrow(srcreg="s0", tgtreg="d0", instr=""):
100 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg".
108 GET_VREG $srcreg, w3
115 %def funopNarrower(srcreg="s0", tgtreg="d0", instr=""):
118 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg".
125 % if srcreg.startswith("d"):
126 GET_VREG_DOUBLE $srcreg, w3
128 GET_VREG_WIDE $srcreg, w3
136 %def funopWide(srcreg="s0", tgtreg="d0", instr=""):
139 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg"
[all...] |
| /external/u-boot/drivers/bios_emulator/x86emu/ |
| ops2.c | 327 u32 *srcreg,*shiftreg; local
329 srcreg = DECODE_RM_LONG_REGISTER(rl);
334 CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
336 u16 *srcreg,*shiftreg; local
338 srcreg = DECODE_RM_WORD_REGISTER(rl);
343 CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
555 u32 *srcreg,*shiftreg; local
558 srcreg = DECODE_RM_LONG_REGISTER(rl);
564 CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
565 *srcreg |= mask
567 u16 *srcreg,*shiftreg; local
770 u32 *destreg,*srcreg; local
787 u16 *destreg,*srcreg; local
880 u32 *srcreg,*shiftreg; local
892 u16 *srcreg,*shiftreg; local
1006 u8 *srcreg; local
1016 u8 *srcreg; local
1040 u16 *srcreg; local
1148 u32 *srcreg; local
1172 u16 *srcreg; local
1244 u32 *srcreg,*shiftreg; local
1256 u16 *srcreg,*shiftreg; local
1309 u32 *srcreg, *dstreg; local
1319 u16 *srcreg, *dstreg; local
1370 u32 *srcreg, *dstreg; local
1380 u16 *srcreg, *dstreg; local
1434 u8 *srcreg; local
1444 u8 *srcreg; local
1468 u16 *srcreg; local
[all...] |
| ops.c | 208 u8 *destreg, *srcreg; local
221 srcreg = DECODE_RM_BYTE_REGISTER(rh);
224 destval = genop_byte_operation[op1](destval, *srcreg);
231 srcreg = DECODE_RM_BYTE_REGISTER(rh);
234 *destreg = genop_byte_operation[op1](*destreg, *srcreg);
260 u32 *srcreg; local
264 srcreg = DECODE_RM_LONG_REGISTER(rh);
267 destval = genop_long_operation[op1](destval, *srcreg);
271 u16 *srcreg; local
275 srcreg = DECODE_RM_WORD_REGISTER(rh)
283 u32 *destreg,*srcreg; local
292 u16 *destreg,*srcreg; local
313 u8 *destreg, *srcreg; local
378 u32 *srcreg; local
386 u16 *srcreg; local
1006 u32 *destreg,*srcreg; local
1027 u16 *destreg,*srcreg; local
1129 u32 *destreg,*srcreg; local
1149 u16 *destreg,*srcreg; local
1651 u8 *destreg, *srcreg; local
1694 u32 *srcreg; local
1704 u16 *srcreg; local
1715 u32 *destreg,*srcreg; local
1724 u16 *destreg,*srcreg; local
1745 u8 *destreg, *srcreg; local
1794 u32 *srcreg; local
1806 u16 *srcreg; local
1820 u32 *destreg,*srcreg; local
1832 u16 *destreg,*srcreg; local
1856 u8 *destreg, *srcreg; local
1896 u32 *srcreg; local
1904 u16 *srcreg; local
1914 u32 *destreg,*srcreg; local
1923 u16 *destreg,*srcreg; local
1944 u8 *destreg, *srcreg; local
2009 u32 *destreg, *srcreg; local
2018 u16 *destreg, *srcreg; local
2039 u16 *destreg, *srcreg; local
2073 u16 *srcreg; local
2105 u16 *destreg, *srcreg; local
[all...] |
| /external/mesa3d/src/gallium/drivers/svga/svgadump/ |
| svga_shader_dump.c | 417 static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, const struct dump_info *di )
422 memcpy(&srcreg_sh, &srcreg, sizeof(srcreg_sh));
424 switch (srcreg.modifier) {
439 switch (srcreg.modifier) {
470 if (srcreg.swizzle_x != 0 || srcreg.swizzle_y != 1 || srcreg.swizzle_z != 2 || srcreg.swizzle_w != 3) {
472 if (srcreg.swizzle_x == srcreg.swizzle_y && srcreg.swizzle_y == srcreg.swizzle_z && srcreg.swizzle_z == srcreg.swizzle_w)
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_program_alu.c | 45 struct rc_dst_register DstReg, struct rc_src_register SrcReg)
55 fpi->U.I.SrcReg[0] = SrcReg;
73 fpi->U.I.SrcReg[0] = SrcReg0;
74 fpi->U.I.SrcReg[1] = SrcReg1;
93 fpi->U.I.SrcReg[0] = SrcReg0;
94 fpi->U.I.SrcReg[1] = SrcReg1;
95 fpi->U.I.SrcReg[2] = SrcReg2;
131 static struct rc_src_register srcreg(int file, int index) function
208 if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY &
[all...] |
| radeon_compiler_util.h | 73 struct rc_src_register lmul_swizzle(unsigned int swizzle, struct rc_src_register srcreg);
|
| radeon_compiler_util.c | 288 struct rc_src_register lmul_swizzle(unsigned int swizzle, struct rc_src_register srcreg)
290 struct rc_src_register tmp = srcreg;
297 tmp.Swizzle |= GET_SWZ(srcreg.Swizzle, swz) << (i*3);
298 tmp.Negate |= GET_BIT(srcreg.Negate, swz) << i;
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| intel_tiled_memcpy.c | 124 __m128i srcreg, dstreg, agmask, ag, rb, br; local
127 srcreg = _mm_loadu_si128((__m128i *)src);
129 rb = _mm_andnot_si128(agmask, srcreg);
130 ag = _mm_and_si128(agmask, srcreg);
141 __m128i srcreg, dstreg, agmask, ag, rb, br; local
144 srcreg = _mm_load_si128((__m128i *)src);
146 rb = _mm_andnot_si128(agmask, srcreg);
147 ag = _mm_and_si128(agmask, srcreg);
|
