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Searched
refs:timing_cfg_7
(Results
1 - 6
of
6
) sorted by null
/external/u-boot/board/freescale/ls1043ardb/
ddr.h
90
.
timing_cfg_7
= 0x13300000,
/external/u-boot/include/
fsl_immap.h
53
u32
timing_cfg_7
; /* SDRAM Timing Configuration 7 */
member in struct:ccsr_ddr
fsl_ddr_sdram.h
280
unsigned int
timing_cfg_7
;
member in struct:fsl_ddr_cfg_regs_s
/external/u-boot/drivers/ddr/fsl/
fsl_ddr_gen4.c
162
ddr_out32(&ddr->
timing_cfg_7
, regs->
timing_cfg_7
);
ctrl_regs.c
[
all
...]
interactive.c
662
CFG_REGS(
timing_cfg_7
),
753
CFG_REGS(
timing_cfg_7
),
[
all
...]
Completed in 1755 milliseconds