| /external/llvm/test/MC/Mips/eva/ |
| invalid-noeva.s | 22 tlbinvf # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| valid_R6.s | 44 tlbinvf # CHECK: tlbinvf # encoding: [0x42,0x00,0x00,0x04]
|
| valid_preR6.s | 60 tlbinvf # CHECK: tlbinvf # encoding: [0x42,0x00,0x00,0x04]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/eva/ |
| invalid-noeva.s | 22 tlbinvf # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| valid_R6.s | 44 tlbinvf # CHECK: tlbinvf # encoding: [0x42,0x00,0x00,0x04]
|
| valid_preR6.s | 60 tlbinvf # CHECK: tlbinvf # encoding: [0x42,0x00,0x00,0x04]
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| valid.s | 185 tlbinvf # CHECK: tlbinvf # encoding: [0x00,0x00,0x53,0x7c]
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 295 tlbinvf # CHECK: tlbinvf # encoding: [0x00,0x00,0x53,0x7c]
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 342 tlbinvf # CHECK: tlbinvf # encoding: [0x00,0x00,0x53,0x7c]
[all...] |
| /external/u-boot/arch/mips/include/asm/ |
| mipsregs.h | 852 static inline void tlbinvf(void) function
857 ".word 0x42000004\n\t" /* tlbinvf */
[all...] |
