| /external/capstone/suite/MC/Mips/ |
| micromips-trap-instructions.s.cs | 11 0x09,0x41,0x67,0x45 = tlti $9, 17767
|
| micromips-trap-instructions-EB.s.cs | 11 0x41,0x09,0x45,0x67 = tlti $9, 17767
|
| mips-control-instructions-64.s.cs | 27 0x04,0x6a,0x00,0x1f = tlti $3, 31
|
| mips-control-instructions.s.cs | 27 0x04,0x6a,0x00,0x1f = tlti $3, 31
|
| /external/llvm/test/MC/Mips/ |
| micromips-trap-instructions.s | 21 # CHECK-EL: tlti $9, 17767 # encoding: [0x09,0x41,0x67,0x45]
36 # CHECK-EB: tlti $9, 17767 # encoding: [0x41,0x09,0x45,0x67]
48 tlti $9, 17767
|
| mips-control-instructions.s | 29 # CHECK32: tlti $3, 31 # encoding: [0x04,0x6a,0x00,0x1f]
60 # CHECK64: tlti $3, 31 # encoding: [0x04,0x6a,0x00,0x1f]
94 tlti $3,31
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| micromips-trap-instructions.s | 21 # CHECK-EL: tlti $9, 17767 # encoding: [0x09,0x41,0x67,0x45]
36 # CHECK-EB: tlti $9, 17767 # encoding: [0x41,0x09,0x45,0x67]
48 tlti $9, 17767
|
| mips-control-instructions.s | 33 # CHECK32: tlti $3, 31 # encoding: [0x04,0x6a,0x00,0x1f]
68 # CHECK64: tlti $3, 31 # encoding: [0x04,0x6a,0x00,0x1f]
102 tlti $3,31
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips2.s | 34 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips2.s | 37 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 27 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64.s | 48 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips2.s | 34 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips2.s | 37 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 27 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64.s | 48 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2.s | 39 tlti $t6,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 70 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 87 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 81 tlti $t2,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/ |
| invalid-mips2.s | 39 tlti $t6,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 68 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 85 tlti $14,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
| valid.s | 241 tlti $14, -21059 # CHECK: tlti $14, -21059 # encoding: [0x05,0xca,0xad,0xbd]
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 166 tlti $14,-21059
|
