| /external/u-boot/drivers/ddr/marvell/a38x/ |
| ddr3_training_bist.c | 27 u32 tx_burst_size; local
46 tx_burst_size = (dir == OPER_WRITE) ?
47 pattern_table[pattern].tx_burst_size : 0;
51 pattern_table[pattern].num_of_phases_tx, tx_burst_size,
446 u32 tx_burst_size; local
468 tx_burst_size = pattern_table[pattern].tx_burst_size;
472 tx_burst_size = 0;
477 tx_burst_size, pattern_table[pattern].num_of_phases_rx, burst_delay,
519 pattern_table[pattern].tx_burst_size,
[all...] |
| ddr3_training_ip.h | 108 u8 tx_burst_size; member in struct:pattern_info
|
| ddr3_training_ip_flow.h | 174 u32 tx_burst_size, u32 rx_phases,
|
| ddr3_training_ip_engine.c | 108 * num_of_phases_tx, tx_burst_size;
348 u32 tx_burst_size; local
399 tx_burst_size = (direction == OPER_WRITE) ?
400 pattern_table[pattern].tx_burst_size : 0;
405 pattern_table[pattern].num_of_phases_tx, tx_burst_size,
625 u32 tx_burst_size, u32 rx_phases,
633 (tx_burst_size << 11) | (delay_between_burst << 15) |
[all...] |
