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  /external/u-boot/board/freescale/common/
pixis.h 11 u8 id;
12 u8 ver;
13 u8 pver;
14 u8 csr;
15 u8 rst;
16 u8 rst2;
17 u8 aux1;
18 u8 spd;
19 u8 aux2;
20 u8 csr2
    [all...]
qixis.h 13 u8 id; /* ID value uniquely identifying each QDS board type */
14 u8 arch; /* Board version information */
15 u8 scver; /* QIXIS Version Register */
16 u8 model; /* Information of software programming model version */
17 u8 tagdata;
18 u8 ctl_sys;
19 u8 aux; /* Auxiliary Register,0x06 */
20 u8 clk_spd;
21 u8 stat_dut;
22 u8 stat_sys
    [all...]
  /external/icu/icu4c/source/tools/escapesrc/
test-simple.cpp 12 u8" \u0301";
13 u8"\u0308 ";
14 u8"sa??a";
15 u8"?";
16 u8"?";
17 u8"sa?\u0127a";
  /external/wpa_supplicant_8/src/wps/
wps_attr_parse.h 16 const u8 *version; /* 1 octet */
17 const u8 *version2; /* 1 octet */
18 const u8 *msg_type; /* 1 octet */
19 const u8 *enrollee_nonce; /* WPS_NONCE_LEN (16) octets */
20 const u8 *registrar_nonce; /* WPS_NONCE_LEN (16) octets */
21 const u8 *uuid_r; /* WPS_UUID_LEN (16) octets */
22 const u8 *uuid_e; /* WPS_UUID_LEN (16) octets */
23 const u8 *auth_type_flags; /* 2 octets */
24 const u8 *encr_type_flags; /* 2 octets */
25 const u8 *conn_type_flags; /* 1 octet *
    [all...]
  /external/wpa_supplicant_8/src/crypto/
milenage.h 12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
13 const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik,
14 u8 *ck, u8 *res, size_t *res_len);
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts
    [all...]
ms_funcs.h 12 int generate_nt_response(const u8 *auth_challenge, const u8 *peer_challenge,
13 const u8 *username, size_t username_len,
14 const u8 *password, size_t password_len,
15 u8 *response);
16 int generate_nt_response_pwhash(const u8 *auth_challenge,
17 const u8 *peer_challenge,
18 const u8 *username, size_t username_len,
19 const u8 *password_hash,
20 u8 *response)
    [all...]
crypto_none.c 15 int md4_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
21 int des_encrypt(const u8 *clear, const u8 *key, u8 *cypher)
  /external/u-boot/include/
fis.h 13 u8 fis_type;
14 u8 pm_port_c;
15 u8 command;
16 u8 features;
17 u8 lba_low;
18 u8 lba_mid;
19 u8 lba_high;
20 u8 device;
21 u8 lba_low_exp;
22 u8 lba_mid_exp
    [all...]
smbios.h 35 u8 anchor[4];
36 u8 checksum;
37 u8 length;
38 u8 major_ver;
39 u8 minor_ver;
41 u8 entry_point_rev;
42 u8 formatted_area[5];
43 u8 intermediate_anchor[5];
44 u8 intermediate_checksum;
48 u8 bcd_rev
    [all...]
zynqmp_tap_delay.h 12 void zynqmp_dll_reset(u8 deviceid);
13 void arasan_zynqmp_set_tapdelay(u8 device_id, u8 uhsmode, u8 bank);
15 inline void zynqmp_dll_reset(u8 deviceid) {}
16 inline void arasan_zynqmp_set_tapdelay(u8 device_id, u8 uhsmode, u8 bank) {}
uboot_aes.h 12 typedef unsigned char u8; typedef
42 void aes_expand_key(u8 *key, u8 *expkey);
51 void aes_encrypt(u8 *in, u8 *expkey, u8 *out);
60 void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
71 void aes_apply_cbc_chain_data(u8 *cbc_chain_data, u8 *src, u8 *dst)
    [all...]
  /external/u-boot/board/keymile/common/
common.h 51 u8 xi_ena; /* General defect enable */
52 u8 pack1[3];
53 u8 en_csn;
54 u8 pack2;
55 u8 safe_mem;
56 u8 pack3;
57 u8 id;
58 u8 pack4;
59 u8 rev;
60 u8 build
    [all...]
  /external/u-boot/arch/arm/include/asm/arch-vf610/
ddrmc-vf610.h 14 u8 tinit;
17 u8 wrlat;
18 u8 caslat_lin;
19 u8 trc;
20 u8 trrd;
21 u8 tccd;
22 u8 tbst_int_interval;
23 u8 tfaw;
24 u8 trp;
25 u8 twtr
    [all...]
  /external/u-boot/board/freescale/c29xpcie/
cpld.h 15 u8 chipid1; /* 0x0 - CPLD Chip ID1 Register */
16 u8 chipid2; /* 0x1 - CPLD Chip ID2 Register */
17 u8 hwver; /* 0x2 - Hardware Version Register */
18 u8 cpldver; /* 0x3 - Software Version Register */
19 u8 res[12];
20 u8 rstcon; /* 0x10 - Reset control register */
21 u8 flhcsr; /* 0x11 - Flash control and status Register */
22 u8 wdcsr; /* 0x12 - Watchdog control and status Register */
23 u8 wdkick; /* 0x13 - Watchdog kick Register */
24 u8 fancsr; /* 0x14 - Fan control and status Register *
    [all...]
  /external/u-boot/arch/x86/include/asm/arch-queensbay/fsp/
fsp_vpd.h 15 u8 dummy[240]; /* Offset 0x0010 */
16 u8 hda_verb_header[12]; /* Offset 0x0100 */
18 u8 hda_verb_data0[16]; /* Offset 0x0110 */
19 u8 hda_verb_data1[16]; /* Offset 0x0120 */
20 u8 hda_verb_data2[16]; /* Offset 0x0130 */
21 u8 hda_verb_data3[16]; /* Offset 0x0140 */
22 u8 hda_verb_data4[16]; /* Offset 0x0150 */
23 u8 hda_verb_data5[16]; /* Offset 0x0160 */
24 u8 hda_verb_data6[16]; /* Offset 0x0170 */
25 u8 hda_verb_data7[16]; /* Offset 0x0180 *
    [all...]
  /external/u-boot/arch/m68k/include/asm/coldfire/
ata.h 15 u8 toff; /* 0x00 */
16 u8 ton; /* 0x01 */
17 u8 t1; /* 0x02 */
18 u8 t2w; /* 0x03 */
19 u8 t2r; /* 0x04 */
20 u8 ta; /* 0x05 */
21 u8 trd; /* 0x06 */
22 u8 t4; /* 0x07 */
23 u8 t9; /* 0x08 */
26 u8 tm; /* 0x09 *
    [all...]
  /external/u-boot/arch/x86/include/asm/arch-baytrail/
global_nvs.h 10 u8 pcnt; /* processor count */
11 u8 iuart_en; /* internal UART enabled */
17 u8 rsvd[254];
  /external/wpa_supplicant_8/src/eap_peer/
mschapv2.h 17 const u8 * mschapv2_remove_domain(const u8 *username, size_t *len);
18 int mschapv2_derive_response(const u8 *username, size_t username_len,
19 const u8 *password, size_t password_len,
21 const u8 *auth_challenge,
22 const u8 *peer_challenge,
23 u8 *nt_response, u8 *auth_response,
24 u8 *master_key);
25 int mschapv2_verify_auth_response(const u8 *auth_response
    [all...]
  /external/u-boot/arch/arm/include/asm/arch-mx6/
mxc_hdmi.h 19 u8 design_id; /* 0x000 */
20 u8 revision_id; /* 0x001 */
21 u8 product_id0; /* 0x002 */
22 u8 product_id1; /* 0x003 */
23 u8 config0_id; /* 0x004 */
24 u8 config1_id; /* 0x005 */
25 u8 config2_id; /* 0x006 */
26 u8 config3_id; /* 0x007 */
27 u8 reserved1[0xf8];
29 u8 ih_fc_stat0; /* 0x100 *
    [all...]
  /external/wpa_supplicant_8/src/pae/
ieee802_1x_key.h 12 int ieee802_1x_cak_aes_cmac(const u8 *msk, size_t msk_bytes, const u8 *mac1,
13 const u8 *mac2, u8 *cak, size_t cak_bytes);
14 int ieee802_1x_ckn_aes_cmac(const u8 *msk, size_t msk_bytes, const u8 *mac1,
15 const u8 *mac2, const u8 *sid,
16 size_t sid_bytes, u8 *ckn);
17 int ieee802_1x_kek_aes_cmac(const u8 *cak, size_t cak_bytes, const u8 *ckn
    [all...]
  /external/u-boot/arch/arm/include/asm/arch-sunxi/
pmic_bus.h 12 int pmic_bus_read(u8 reg, u8 *data);
13 int pmic_bus_write(u8 reg, u8 data);
14 int pmic_bus_setbits(u8 reg, u8 bits);
15 int pmic_bus_clrbits(u8 reg, u8 bits);
  /external/u-boot/arch/arm/mach-tegra/tegra20/
crypto.h 17 int sign_data_block(u8 *source, unsigned length, u8 *signature);
  /external/u-boot/arch/x86/include/asm/arch-quark/
global_nvs.h 10 u8 pcnt; /* processor count */
16 u8 rsvd[255];
  /external/u-boot/arch/x86/include/asm/arch-tangier/
global_nvs.h 12 u8 pcnt; /* processor count */
18 u8 rsvd[255];
  /external/u-boot/board/freescale/ls1046ardb/
cpld.h 14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
16 u8 pcba_ver; /* 0x2 - PCBA Revision Register */
17 u8 system_rst; /* 0x3 - system reset register */
18 u8 soft_mux_on; /* 0x4 - Switch Control Enable Register */
19 u8 cfg_rcw_src1; /* 0x5 - RCW Source Location POR Regsiter 1 */
20 u8 cfg_rcw_src2; /* 0x6 - RCW Source Location POR Regsiter 2 */
21 u8 vbank; /* 0x7 - QSPI Flash Bank Setting Register */
22 u8 sysclk_sel; /* 0x8 - System clock POR Register */
23 u8 uart_sel; /* 0x9 - UART1 Connection Control Register *
    [all...]

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