| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 115 v1f64 = 60, // 1 x f64
244 SimpleTy == MVT::v1f64);
364 case v1f64:
425 case v1f64: return 1;
477 case v1f64: return 64;
656 if (NumElements == 1) return MVT::v1f64;
|
| /external/clang/test/CodeGen/ |
| systemz-abi-vector.c | 25 typedef __attribute__((vector_size(8))) double v1f64; typedef
118 v1f64 pass_v1f64(v1f64 arg) { return arg; }
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | [all...] |
| AArch64ISelLowering.cpp | 90 addDRTypeForNEON(MVT::v1f64);
521 // FIXME: v1f64 shouldn't be legal if we can avoid it, because it leads to
523 setOperationAction(ISD::FABS, MVT::v1f64, Expand);
524 setOperationAction(ISD::FADD, MVT::v1f64, Expand);
525 setOperationAction(ISD::FCEIL, MVT::v1f64, Expand);
526 setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand);
527 setOperationAction(ISD::FCOS, MVT::v1f64, Expand);
528 setOperationAction(ISD::FDIV, MVT::v1f64, Expand);
529 setOperationAction(ISD::FFLOOR, MVT::v1f64, Expand);
530 setOperationAction(ISD::FMA, MVT::v1f64, Expand)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | [all...] |
| AArch64ISelLowering.cpp | 149 addDRTypeForNEON(MVT::v1f64);
619 // FIXME: v1f64 shouldn't be legal if we can avoid it, because it leads to
621 setOperationAction(ISD::FABS, MVT::v1f64, Expand);
622 setOperationAction(ISD::FADD, MVT::v1f64, Expand);
623 setOperationAction(ISD::FCEIL, MVT::v1f64, Expand);
624 setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand);
625 setOperationAction(ISD::FCOS, MVT::v1f64, Expand);
626 setOperationAction(ISD::FDIV, MVT::v1f64, Expand);
627 setOperationAction(ISD::FFLOOR, MVT::v1f64, Expand);
628 setOperationAction(ISD::FMA, MVT::v1f64, Expand)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/ |
| MachineValueType.h | 157 v1f64 = 93, // 1 x f64
347 SimpleTy == MVT::v2f32 || SimpleTy == MVT::v1f64);
507 case v1f64:
609 case v1f64:
687 case v1f64:
897 if (NumElements == 1) return MVT::v1f64;
[all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 192 case MVT::v1f64: return "v1f64";
270 case MVT::v1f64: return VectorType::get(Type::getDoubleTy(Context), 1);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| ValueTypes.cpp | 189 case MVT::v1f64: return "v1f64";
270 case MVT::v1f64: return VectorType::get(Type::getDoubleTy(Context), 1);
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| AArch64GenCallingConv.inc | 230 LocVT == MVT::v1f64 ||
280 LocVT == MVT::v1f64 ||
474 LocVT == MVT::v1f64 ||
526 LocVT == MVT::v1f64 ||
612 LocVT == MVT::v1f64 ||
924 LocVT == MVT::v1f64 ||
[all...] |
| AArch64GenDAGISel.inc | [all...] |
| AArch64GenFastISel.inc | 709 case MVT::v1f64: return fastEmit_AArch64ISD_FCMEQz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
777 case MVT::v1f64: return fastEmit_AArch64ISD_FCMGEz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
845 case MVT::v1f64: return fastEmit_AArch64ISD_FCMGTz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
913 case MVT::v1f64: return fastEmit_AArch64ISD_FCMLEz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
[all...] |
| AArch64GenRegisterInfo.inc | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 120 case MVT::v1f64: return "MVT::v1f64";
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 128 case MVT::v1f64: return "MVT::v1f64";
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | [all...] |
