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  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
vop1-gfx9.s 15 v_cvt_norm_i16_f16 v5, v1
16 // GFX9: v_cvt_norm_i16_f16_e32 v5, v1 ; encoding: [0x01,0x9b,0x0a,0x7e]
19 v_cvt_norm_i16_f16 v5, -4.0
20 // GFX9: v_cvt_norm_i16_f16_e32 v5, -4.0 ; encoding: [0xf7,0x9a,0x0a,0x7e]
23 v_cvt_norm_i16_f16 v5, 0xfe0b
24 // GFX9: v_cvt_norm_i16_f16_e32 v5, 0xfe0b ; encoding: [0xff,0x9a,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
27 v_cvt_norm_u16_f16 v5, s101
28 // GFX9: v_cvt_norm_u16_f16_e32 v5, s101 ; encoding: [0x65,0x9c,0x0a,0x7e]
35 v_sat_pk_u8_i16 v5, -1
36 // GFX9: v_sat_pk_u8_i16_e32 v5, -1 ; encoding: [0xc1,0x9e,0x0a,0x7e
    [all...]
vop3-gfx9.s 34 v_pack_b32_f16 v5, v1, v2 op_sel:[1,0,0]
35 // GFX9: v_pack_b32_f16 v5, v1, v2 op_sel:[1,0,0] ; encoding: [0x05,0x08,0xa0,0xd2,0x01,0x05,0x02,0x00]
37 v_pack_b32_f16 v5, v1, v2 op_sel:[0,1,0]
38 // GFX9: v_pack_b32_f16 v5, v1, v2 op_sel:[0,1,0] ; encoding: [0x05,0x10,0xa0,0xd2,0x01,0x05,0x02,0x00]
40 v_pack_b32_f16 v5, v1, v2 op_sel:[0,0,1]
41 // GFX9: v_pack_b32_f16 v5, v1, v2 op_sel:[0,0,1] ; encoding: [0x05,0x40,0xa0,0xd2,0x01,0x05,0x02,0x00]
63 v_max3_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
64 // GFX9: v_max3_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x04]
66 v_max3_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
67 // GFX9: v_max3_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0xf7,0xd1,0x01,0x05,0x0e,0x04
    [all...]
gfx9_asm_all.s 523 ds_add_rtn_u32 v5, v1, v2 offset:65535
529 ds_add_rtn_u32 v5, v255, v2 offset:65535
532 ds_add_rtn_u32 v5, v1, v255 offset:65535
535 ds_add_rtn_u32 v5, v1, v2
538 ds_add_rtn_u32 v5, v1, v2 offset:0
541 ds_add_rtn_u32 v5, v1, v2 offset:4
544 ds_add_rtn_u32 v5, v1, v2 offset:65535 gds
547 ds_sub_rtn_u32 v5, v1, v2 offset:65535
553 ds_sub_rtn_u32 v5, v255, v2 offset:65535
556 ds_sub_rtn_u32 v5, v1, v255 offset:6553
    [all...]
gfx8_asm_all.s 522 ds_add_rtn_u32 v5, v1, v2 offset:65535
528 ds_add_rtn_u32 v5, v255, v2 offset:65535
531 ds_add_rtn_u32 v5, v1, v255 offset:65535
534 ds_add_rtn_u32 v5, v1, v2
537 ds_add_rtn_u32 v5, v1, v2 offset:0
540 ds_add_rtn_u32 v5, v1, v2 offset:4
543 ds_add_rtn_u32 v5, v1, v2 offset:65535 gds
546 ds_sub_rtn_u32 v5, v1, v2 offset:65535
552 ds_sub_rtn_u32 v5, v255, v2 offset:65535
555 ds_sub_rtn_u32 v5, v1, v255 offset:6553
    [all...]
gfx7_asm_all.s 582 ds_add_rtn_u32 v5, v1, v2 offset:65535
588 ds_add_rtn_u32 v5, v255, v2 offset:65535
591 ds_add_rtn_u32 v5, v1, v255 offset:65535
594 ds_add_rtn_u32 v5, v1, v2
597 ds_add_rtn_u32 v5, v1, v2 offset:0
600 ds_add_rtn_u32 v5, v1, v2 offset:4
603 ds_add_rtn_u32 v5, v1, v2 offset:65535 gds
606 ds_sub_rtn_u32 v5, v1, v2 offset:65535
612 ds_sub_rtn_u32 v5, v255, v2 offset:65535
615 ds_sub_rtn_u32 v5, v1, v255 offset:6553
    [all...]
vop3.s 197 v_add_f32_e64 v1, v3, v5
198 // SICI: v_add_f32_e64 v1, v3, v5 ; encoding: [0x01,0x00,0x06,0xd2,0x03,0x0b,0x02,0x00]
199 // VI: v_add_f32_e64 v1, v3, v5 ; encoding: [0x01,0x00,0x01,0xd1,0x03,0x0b,0x02,0x00]
204 v_cndmask_b32 v1, v3, v5, s[4:5]
205 // SICI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd2,0x03,0x0b,0x12,0x00]
206 // VI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0x12,0x00]
208 v_cndmask_b32_e64 v1, v3, v5, s[4:5]
209 // SICI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd2,0x03,0x0b,0x12,0x00]
210 // VI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0x12,0x00]
212 v_cndmask_b32_e64 v1, v3, v5, vc
    [all...]
flat.s 53 // flat_atomic_add v1, v[3:4], v5 slc glc
55 flat_atomic_add v1, v[3:4], v5 offset:0 glc slc
57 // CI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0xcb,0xdc,0x03,0x05,0x00,0x01]
58 // VI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0x0b,0xdd,0x03,0x05,0x00,0x01]
60 flat_atomic_add v[3:4], v5 slc
62 // CI: flat_atomic_add v[3:4], v5 slc ; encoding: [0x00,0x00,0xca,0xdc,0x03,0x05,0x00,0x00]
63 // VI: flat_atomic_add v[3:4], v5 slc ; encoding: [0x00,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
135 flat_atomic_swap v[3:4], v5
137 // CI: flat_atomic_swap v[3:4], v5 ; encoding: [0x00,0x00,0xc0,0xdc,0x03,0x05,0x00,0x00]
138 // VI: flat_atomic_swap v[3:4], v5 ; encoding: [0x00,0x00,0x00,0xdd,0x03,0x05,0x00,0x00
    [all...]
vop3-modifiers.s 129 v_add_f32 v5, -1, v2
132 v_add_f32 v5, -16, v2
135 v_add_f32 v5, 0x3e22f983, v2
139 v_add_f32 v5, abs(0x3e22f983), v2
143 v_add_f32 v5, neg(0xbe22f983), v2
147 v_add_f32 v5, neg(0x3e22f983), v2
291 v_cvt_f32_i32_e64 v5, s1 clamp
294 v_cvt_f32_i32_e64 v5, s1 mul:2
297 v_cvt_f32_i32_e64 v5, s1 mul:4
300 v_cvt_f32_i32_e64 v5, s1 div:
    [all...]
vop3-errs.s 53 v_interp_mov_f32_e64 v5, p10, attr0.x high
56 v_interp_mov_f32_e64 v5, p10, attr0.x v0
59 v_interp_p1_f32_e64 v5, v2, attr0.x high
62 v_interp_p1_f32_e64 v5, v2, attr0.x v0
71 v_interp_p1ll_f16 v5, p0, attr31.x
74 v_interp_p1ll_f16 v5, v2, attr31.x v0
77 v_interp_p2_f16 v5, v2, attr1.x, v3 mul:2
dl-insts.s 8 v_fmac_f32 v5, v1, v2
12 v_fmac_f32 v5, v255, v2
14 v_fmac_f32 v5, s1, v2
16 v_fmac_f32 v5, s101, v2
18 v_fmac_f32 v5, flat_scratch_lo, v2
20 v_fmac_f32 v5, flat_scratch_hi, v2
22 v_fmac_f32 v5, vcc_lo, v2
24 v_fmac_f32 v5, vcc_hi, v2
26 v_fmac_f32 v5, m0, v2
28 v_fmac_f32 v5, exec_lo, v
    [all...]
flat-global.s 135 global_atomic_swap v[3:4], v5, off
136 // GFX9: global_atomic_swap v[3:4], v5, off ; encoding: [0x00,0x80,0x00,0xdd,0x03,0x05,0x7f,0x00]
143 global_atomic_add v[3:4], v5, off
144 // GFX9: global_atomic_add v[3:4], v5, off ; encoding: [0x00,0x80,0x08,0xdd,0x03,0x05,0x7f,0x00]
147 global_atomic_sub v[3:4], v5, off
148 // GFX9: global_atomic_sub v[3:4], v5, off ; encoding: [0x00,0x80,0x0c,0xdd,0x03,0x05,0x7f,0x00]
151 global_atomic_smin v[3:4], v5, off
152 // GFX9: global_atomic_smin v[3:4], v5, off ; encoding: [0x00,0x80,0x10,0xdd,0x03,0x05,0x7f,0x00]
155 global_atomic_umin v[3:4], v5, off
156 // GFX9: global_atomic_umin v[3:4], v5, off ; encoding: [0x00,0x80,0x14,0xdd,0x03,0x05,0x7f,0x00
    [all...]
mubuf-gfx9.s 36 buffer_load_format_d16_hi_x v5, off, s[8:11], s3
37 // GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 ; encoding: [0x00,0x00,0x98,0xe0,0x00,0x05,0x02,0x03]
40 buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095
41 // GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x98,0xe0,0x00,0x05,0x02,0x03]
44 buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095
45 // GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03]
48 buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095
49 // GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095 ; encoding: [0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03]
52 buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc
53 // GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x98,0xe0,0x00,0x05,0x02,0x03
    [all...]
  /dalvik/dx/tests/096-dex-giant-catch/
Blort.java 19 long v5, long v6, long v7, long v8) {
  /external/clang/test/CodeGen/
cxx-value-init.cpp 10 _Complex float v5 = typeof(_Complex float)(); local
mmx-inline-asm.c 9 __m64 v1, v2, v3, v4, v5, v6, v7; local
20 "=&y" (v4), "=&y" (v5), "=&y" (v6), "=y" (v7)
vld_dup.c 12 int64x1x4_t v5; local
46 v5 = vld4_dup_s64(v7);
  /external/clang/test/Sema/
vector-assign.c 13 v4ss v5; local
18 v1 = v5; // expected-warning {{incompatible vector types assigning to 'v2s' (vector of 2 'int' values) from 'v4ss' (vector of 4 'short' values)}}
23 v2 = v5; // expected-warning {{incompatible vector types assigning to 'v2u' (vector of 2 'unsigned int' values) from 'v4ss' (vector of 4 'short' values)}}
28 v3 = v5; // expected-error {{assigning to 'v1s' (vector of 1 'int' value) from incompatible type 'v4ss'}}
33 v4 = v5; // expected-warning {{incompatible vector types assigning to 'v2f' (vector of 2 'float' values) from 'v4ss' (vector of 4 'short' values)}}
35 v5 = v1; // expected-warning {{incompatible vector types assigning to 'v4ss' (vector of 4 'short' values) from 'v2s' (vector of 2 'int' values)}}
36 v5 = v2; // expected-warning {{incompatible vector types assigning to 'v4ss' (vector of 4 'short' values) from 'v2u' (vector of 2 'unsigned int' values)}}
37 v5 = v3; // expected-error {{assigning to 'v4ss' (vector of 4 'short' values) from incompatible type 'v1s' (vector of 1 'int' value)}}
38 v5 = v4; // expected-warning {{incompatible vector types assigning to 'v4ss' (vector of 4 'short' values) from 'v2f'}}
  /external/llvm/test/MC/AMDGPU/
flat.s 92 // flat_atomic_add v1, v[3:4], v5 slc glc
93 // flat_atomic_add v1, v[3:4], v5 slc glc tfe
94 // flat_atomic_add v1, v[3:4], v5 slc tfe glc
95 // flat_atomic_add v1, v[3:4], v5 tfe glc
96 // flat_atomic_add v[3:4], v5 tfe glc
97 // flat_atomic_add v1, v[3:4], v5 tfe glc slc
98 // flat_atomic_add v1, v[3:4], v5 tfe slc glc
100 flat_atomic_add v1 v[3:4], v5 glc slc
102 // CI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0xcb,0xdc,0x03,0x05,0x00,0x01]
103 // VI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0x0b,0xdd,0x03,0x05,0x00,0x01
    [all...]
  /external/llvm/test/MC/AArch64/
neon-scalar-dup.s 15 dup d3, v5.d[0]
16 dup d6, v5.d[1]
27 // CHECK: {{dup|mov}} d3, v5.d[0] // encoding: [0xa3,0x04,0x08,0x5e]
28 // CHECK: {{dup|mov}} d6, v5.d[1] // encoding: [0xa6,0x04,0x18,0x5e]
42 mov d3, v5.d[0]
43 mov d6, v5.d[1]
54 // CHECK: {{dup|mov}} d3, v5.d[0] // encoding: [0xa3,0x04,0x08,0x5e]
55 // CHECK: {{dup|mov}} d6, v5.d[1] // encoding: [0xa6,0x04,0x18,0x5e]
arm64-simd-ldst.s 11 ld1.8b {v4, v5, v6}, [x3]
89 st1.2d {v5}, [x1]
102 ; CHECK: ld1.8b { v4, v5, v6 }, [x3] ; encoding: [0x64,0x60,0x40,0x0c]
181 ; CHECK: st1.2d { v5 }, [x1] ; encoding: [0x25,0x7c,0x00,0x4c]
187 ld2.8b {v4, v5}, [x19]
188 ld2.16b {v4, v5}, [x19]
189 ld2.4h {v4, v5}, [x19]
190 ld2.8h {v4, v5}, [x19]
191 ld2.2s {v4, v5}, [x19]
192 ld2.4s {v4, v5}, [x19
    [all...]
case-insen-reg-names.s 3 fadd v0.2d, v5.2d, v6.2d
4 fadd V0.2d, V5.2d, V6.2d
5 fadd v0.2d, V5.2d, v6.2d
6 // CHECK: fadd v0.2d, v5.2d, v6.2d // encoding: [0xa0,0xd4,0x66,0x4e]
7 // CHECK: fadd v0.2d, v5.2d, v6.2d // encoding: [0xa0,0xd4,0x66,0x4e]
8 // CHECK: fadd v0.2d, v5.2d, v6.2d // encoding: [0xa0,0xd4,0x66,0x4e]
  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
neon-scalar-dup.s 15 dup d3, v5.d[0]
16 dup d6, v5.d[1]
27 // CHECK: {{dup|mov}} d3, v5.d[0] // encoding: [0xa3,0x04,0x08,0x5e]
28 // CHECK: {{dup|mov}} d6, v5.d[1] // encoding: [0xa6,0x04,0x18,0x5e]
42 mov d3, v5.d[0]
43 mov d6, v5.d[1]
54 // CHECK: {{dup|mov}} d3, v5.d[0] // encoding: [0xa3,0x04,0x08,0x5e]
55 // CHECK: {{dup|mov}} d6, v5.d[1] // encoding: [0xa6,0x04,0x18,0x5e]
arm64-simd-ldst.s 11 ld1.8b {v4, v5, v6}, [x3]
89 st1.2d {v5}, [x1]
102 ; CHECK: ld1.8b { v4, v5, v6 }, [x3] ; encoding: [0x64,0x60,0x40,0x0c]
181 ; CHECK: st1.2d { v5 }, [x1] ; encoding: [0x25,0x7c,0x00,0x4c]
187 ld2.8b {v4, v5}, [x19]
188 ld2.16b {v4, v5}, [x19]
189 ld2.4h {v4, v5}, [x19]
190 ld2.8h {v4, v5}, [x19]
191 ld2.2s {v4, v5}, [x19]
192 ld2.4s {v4, v5}, [x19
    [all...]
case-insen-reg-names.s 3 fadd v0.2d, v5.2d, v6.2d
4 fadd V0.2d, V5.2d, V6.2d
5 fadd v0.2d, V5.2d, v6.2d
6 // CHECK: fadd v0.2d, v5.2d, v6.2d // encoding: [0xa0,0xd4,0x66,0x4e]
7 // CHECK: fadd v0.2d, v5.2d, v6.2d // encoding: [0xa0,0xd4,0x66,0x4e]
8 // CHECK: fadd v0.2d, v5.2d, v6.2d // encoding: [0xa0,0xd4,0x66,0x4e]
  /external/clang/test/SemaCXX/
type-convert-construct.cpp 13 int v5 = int; // expected-error {{expected '(' for function-style cast or type construction}} local

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