/external/u-boot/include/ |
video_logo.h | 22 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 23 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1, 0x80, 0xe1 [all...] |
/external/capstone/suite/MC/ARM/ |
dot-req.s.cs | 2 0x05,0xb0,0xa0,0xe1 = mov r11, r5 3 0x06,0x10,0xa0,0xe1 = mov r1, r6 package
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crc32.s.cs | 2 0x42,0x00,0x01,0xe1 = crc32b r0, r1, r2 3 0x42,0x00,0x21,0xe1 = crc32h r0, r1, r2 package 4 0x42,0x00,0x41,0xe1 = crc32w r0, r1, r2 package 5 0x42,0x02,0x01,0xe1 = crc32cb r0, r1, r2 package 6 0x42,0x02,0x21,0xe1 = crc32ch r0, r1, r2 package 7 0x42,0x02,0x41,0xe1 = crc32cw r0, r1, r2 package
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/external/vixl/test/aarch32/traces/ |
assembler-rd-rn-rm-crc32b-a32.h | 38 0x4c, 0x20, 0x0a, 0xe1 // crc32b r2 r10 r12 41 0x4b, 0x20, 0x0b, 0xe1 // crc32b r2 r11 r11 44 0x40, 0x30, 0x01, 0xe1 // crc32b r3 r1 r0 47 0x4d, 0x10, 0x07, 0xe1 // crc32b r1 r7 r13 50 0x4b, 0x30, 0x0e, 0xe1 // crc32b r3 r14 r11 53 0x41, 0xc0, 0x03, 0xe1 // crc32b r12 r3 r1 56 0x42, 0x30, 0x09, 0xe1 // crc32b r3 r9 r2 59 0x43, 0x10, 0x03, 0xe1 // crc32b r1 r3 r3 62 0x4a, 0x40, 0x05, 0xe1 // crc32b r4 r5 r10 65 0x48, 0xd0, 0x06, 0xe1 // crc32b r13 r6 r [all...] |
assembler-rd-rn-rm-crc32cb-a32.h | 38 0x4c, 0x22, 0x0a, 0xe1 // crc32cb r2 r10 r12 41 0x4b, 0x22, 0x0b, 0xe1 // crc32cb r2 r11 r11 44 0x40, 0x32, 0x01, 0xe1 // crc32cb r3 r1 r0 47 0x4d, 0x12, 0x07, 0xe1 // crc32cb r1 r7 r13 50 0x4b, 0x32, 0x0e, 0xe1 // crc32cb r3 r14 r11 53 0x41, 0xc2, 0x03, 0xe1 // crc32cb r12 r3 r1 56 0x42, 0x32, 0x09, 0xe1 // crc32cb r3 r9 r2 59 0x43, 0x12, 0x03, 0xe1 // crc32cb r1 r3 r3 62 0x4a, 0x42, 0x05, 0xe1 // crc32cb r4 r5 r10 65 0x48, 0xd2, 0x06, 0xe1 // crc32cb r13 r6 r [all...] |
assembler-rd-rn-rm-crc32ch-a32.h | 38 0x4c, 0x22, 0x2a, 0xe1 // crc32ch r2 r10 r12 41 0x4b, 0x22, 0x2b, 0xe1 // crc32ch r2 r11 r11 44 0x40, 0x32, 0x21, 0xe1 // crc32ch r3 r1 r0 47 0x4d, 0x12, 0x27, 0xe1 // crc32ch r1 r7 r13 50 0x4b, 0x32, 0x2e, 0xe1 // crc32ch r3 r14 r11 53 0x41, 0xc2, 0x23, 0xe1 // crc32ch r12 r3 r1 56 0x42, 0x32, 0x29, 0xe1 // crc32ch r3 r9 r2 59 0x43, 0x12, 0x23, 0xe1 // crc32ch r1 r3 r3 62 0x4a, 0x42, 0x25, 0xe1 // crc32ch r4 r5 r10 65 0x48, 0xd2, 0x26, 0xe1 // crc32ch r13 r6 r [all...] |
assembler-rd-rn-rm-crc32cw-a32.h | 38 0x4c, 0x22, 0x4a, 0xe1 // crc32cw r2 r10 r12 41 0x4b, 0x22, 0x4b, 0xe1 // crc32cw r2 r11 r11 44 0x40, 0x32, 0x41, 0xe1 // crc32cw r3 r1 r0 47 0x4d, 0x12, 0x47, 0xe1 // crc32cw r1 r7 r13 50 0x4b, 0x32, 0x4e, 0xe1 // crc32cw r3 r14 r11 53 0x41, 0xc2, 0x43, 0xe1 // crc32cw r12 r3 r1 56 0x42, 0x32, 0x49, 0xe1 // crc32cw r3 r9 r2 59 0x43, 0x12, 0x43, 0xe1 // crc32cw r1 r3 r3 62 0x4a, 0x42, 0x45, 0xe1 // crc32cw r4 r5 r10 65 0x48, 0xd2, 0x46, 0xe1 // crc32cw r13 r6 r [all...] |
assembler-rd-rn-rm-crc32h-a32.h | 38 0x4c, 0x20, 0x2a, 0xe1 // crc32h r2 r10 r12 41 0x4b, 0x20, 0x2b, 0xe1 // crc32h r2 r11 r11 44 0x40, 0x30, 0x21, 0xe1 // crc32h r3 r1 r0 47 0x4d, 0x10, 0x27, 0xe1 // crc32h r1 r7 r13 50 0x4b, 0x30, 0x2e, 0xe1 // crc32h r3 r14 r11 53 0x41, 0xc0, 0x23, 0xe1 // crc32h r12 r3 r1 56 0x42, 0x30, 0x29, 0xe1 // crc32h r3 r9 r2 59 0x43, 0x10, 0x23, 0xe1 // crc32h r1 r3 r3 62 0x4a, 0x40, 0x25, 0xe1 // crc32h r4 r5 r10 65 0x48, 0xd0, 0x26, 0xe1 // crc32h r13 r6 r [all...] |
assembler-rd-rn-rm-crc32w-a32.h | 38 0x4c, 0x20, 0x4a, 0xe1 // crc32w r2 r10 r12 41 0x4b, 0x20, 0x4b, 0xe1 // crc32w r2 r11 r11 44 0x40, 0x30, 0x41, 0xe1 // crc32w r3 r1 r0 47 0x4d, 0x10, 0x47, 0xe1 // crc32w r1 r7 r13 50 0x4b, 0x30, 0x4e, 0xe1 // crc32w r3 r14 r11 53 0x41, 0xc0, 0x43, 0xe1 // crc32w r12 r3 r1 56 0x42, 0x30, 0x49, 0xe1 // crc32w r3 r9 r2 59 0x43, 0x10, 0x43, 0xe1 // crc32w r1 r3 r3 62 0x4a, 0x40, 0x45, 0xe1 // crc32w r4 r5 r10 65 0x48, 0xd0, 0x46, 0xe1 // crc32w r13 r6 r [all...] |
assembler-cond-rd-memop-rs-ldrh-a32.h | 62 0xb3, 0x90, 0x92, 0xe1 // ldrh al r9 r2 plus r3 Offset 74 0xbe, 0x90, 0x9d, 0xe1 // ldrh al r9 r13 plus r14 Offset 119 0xbc, 0x50, 0x91, 0xe1 // ldrh al r5 r1 plus r12 Offset 128 0xb0, 0x90, 0x9c, 0xe1 // ldrh al r9 r12 plus r0 Offset 149 0xbc, 0x10, 0x9b, 0xe1 // ldrh al r1 r11 plus r12 Offset 155 0xbd, 0x60, 0x96, 0xe1 // ldrh al r6 r6 plus r13 Offset 272 0xb3, 0x10, 0x90, 0xe1 // ldrh al r1 r0 plus r3 Offset 281 0xbb, 0x20, 0x96, 0xe1 // ldrh al r2 r6 plus r11 Offset 299 0xb3, 0x50, 0x9e, 0xe1 // ldrh al r5 r14 plus r3 Offset 329 0xbd, 0xd0, 0x9d, 0xe1 // ldrh al r13 r13 plus r13 Offse [all...] |
assembler-cond-rd-memop-rs-ldrsb-a32.h | 62 0xd3, 0x90, 0x92, 0xe1 // ldrsb al r9 r2 plus r3 Offset 74 0xde, 0x90, 0x9d, 0xe1 // ldrsb al r9 r13 plus r14 Offset 119 0xdc, 0x50, 0x91, 0xe1 // ldrsb al r5 r1 plus r12 Offset 128 0xd0, 0x90, 0x9c, 0xe1 // ldrsb al r9 r12 plus r0 Offset 149 0xdc, 0x10, 0x9b, 0xe1 // ldrsb al r1 r11 plus r12 Offset 155 0xdd, 0x60, 0x96, 0xe1 // ldrsb al r6 r6 plus r13 Offset 272 0xd3, 0x10, 0x90, 0xe1 // ldrsb al r1 r0 plus r3 Offset 281 0xdb, 0x20, 0x96, 0xe1 // ldrsb al r2 r6 plus r11 Offset 299 0xd3, 0x50, 0x9e, 0xe1 // ldrsb al r5 r14 plus r3 Offset 329 0xdd, 0xd0, 0x9d, 0xe1 // ldrsb al r13 r13 plus r13 Offse [all...] |
assembler-cond-rd-memop-rs-ldrsh-a32.h | 62 0xf3, 0x90, 0x92, 0xe1 // ldrsh al r9 r2 plus r3 Offset 74 0xfe, 0x90, 0x9d, 0xe1 // ldrsh al r9 r13 plus r14 Offset 119 0xfc, 0x50, 0x91, 0xe1 // ldrsh al r5 r1 plus r12 Offset 128 0xf0, 0x90, 0x9c, 0xe1 // ldrsh al r9 r12 plus r0 Offset 149 0xfc, 0x10, 0x9b, 0xe1 // ldrsh al r1 r11 plus r12 Offset 155 0xfd, 0x60, 0x96, 0xe1 // ldrsh al r6 r6 plus r13 Offset 272 0xf3, 0x10, 0x90, 0xe1 // ldrsh al r1 r0 plus r3 Offset 281 0xfb, 0x20, 0x96, 0xe1 // ldrsh al r2 r6 plus r11 Offset 299 0xf3, 0x50, 0x9e, 0xe1 // ldrsh al r5 r14 plus r3 Offset 329 0xfd, 0xd0, 0x9d, 0xe1 // ldrsh al r13 r13 plus r13 Offse [all...] |
assembler-cond-rd-memop-rs-strh-a32.h | 62 0xb3, 0x90, 0x82, 0xe1 // strh al r9 r2 plus r3 Offset 74 0xbe, 0x90, 0x8d, 0xe1 // strh al r9 r13 plus r14 Offset 119 0xbc, 0x50, 0x81, 0xe1 // strh al r5 r1 plus r12 Offset 128 0xb0, 0x90, 0x8c, 0xe1 // strh al r9 r12 plus r0 Offset 149 0xbc, 0x10, 0x8b, 0xe1 // strh al r1 r11 plus r12 Offset 155 0xbd, 0x60, 0x86, 0xe1 // strh al r6 r6 plus r13 Offset 272 0xb3, 0x10, 0x80, 0xe1 // strh al r1 r0 plus r3 Offset 281 0xbb, 0x20, 0x86, 0xe1 // strh al r2 r6 plus r11 Offset 299 0xb3, 0x50, 0x8e, 0xe1 // strh al r5 r14 plus r3 Offset 329 0xbd, 0xd0, 0x8d, 0xe1 // strh al r13 r13 plus r13 Offse [all...] |
assembler-cond-rd-memop-immediate-512-strh-a32.h | 53 0xb0, 0x40, 0xcd, 0xe1 // strh al r4 r13 plus 0 Offset 89 0xb0, 0xa0, 0xc3, 0xe1 // strh al r10 r3 plus 0 Offset 92 0xb0, 0x70, 0xc9, 0xe1 // strh al r7 r9 plus 0 Offset 116 0xb0, 0xd0, 0xce, 0xe1 // strh al r13 r14 plus 0 Offset 128 0xb0, 0x50, 0xca, 0xe1 // strh al r5 r10 plus 0 Offset 137 0xb0, 0x70, 0xcc, 0xe1 // strh al r7 r12 plus 0 Offset 146 0xb0, 0x90, 0xce, 0xe1 // strh al r9 r14 plus 0 Offset 173 0xb0, 0xc0, 0xc4, 0xe1 // strh al r12 r4 plus 0 Offset 191 0xb0, 0x60, 0xc6, 0xe1 // strh al r6 r6 plus 0 Offset 338 0xb8, 0x02, 0x4b, 0xe1 // strh al r0 r11 minus 40 Offse [all...] |
assembler-cond-rd-memop-immediate-512-ldrh-a32.h | 53 0xb0, 0x40, 0xdd, 0xe1 // ldrh al r4 r13 plus 0 Offset 89 0xb0, 0xa0, 0xd3, 0xe1 // ldrh al r10 r3 plus 0 Offset 92 0xb0, 0x70, 0xd9, 0xe1 // ldrh al r7 r9 plus 0 Offset 116 0xb0, 0xd0, 0xde, 0xe1 // ldrh al r13 r14 plus 0 Offset 128 0xb0, 0x50, 0xda, 0xe1 // ldrh al r5 r10 plus 0 Offset 137 0xb0, 0x70, 0xdc, 0xe1 // ldrh al r7 r12 plus 0 Offset 146 0xb0, 0x90, 0xde, 0xe1 // ldrh al r9 r14 plus 0 Offset 173 0xb0, 0xc0, 0xd4, 0xe1 // ldrh al r12 r4 plus 0 Offset 191 0xb0, 0x60, 0xd6, 0xe1 // ldrh al r6 r6 plus 0 Offset 338 0xb8, 0x02, 0x5b, 0xe1 // ldrh al r0 r11 minus 40 Offse [all...] |
assembler-cond-rd-memop-immediate-512-ldrsb-a32.h | 53 0xd0, 0x40, 0xdd, 0xe1 // ldrsb al r4 r13 plus 0 Offset 89 0xd0, 0xa0, 0xd3, 0xe1 // ldrsb al r10 r3 plus 0 Offset 92 0xd0, 0x70, 0xd9, 0xe1 // ldrsb al r7 r9 plus 0 Offset 116 0xd0, 0xd0, 0xde, 0xe1 // ldrsb al r13 r14 plus 0 Offset 128 0xd0, 0x50, 0xda, 0xe1 // ldrsb al r5 r10 plus 0 Offset 137 0xd0, 0x70, 0xdc, 0xe1 // ldrsb al r7 r12 plus 0 Offset 146 0xd0, 0x90, 0xde, 0xe1 // ldrsb al r9 r14 plus 0 Offset 173 0xd0, 0xc0, 0xd4, 0xe1 // ldrsb al r12 r4 plus 0 Offset 191 0xd0, 0x60, 0xd6, 0xe1 // ldrsb al r6 r6 plus 0 Offset 338 0xd8, 0x02, 0x5b, 0xe1 // ldrsb al r0 r11 minus 40 Offse [all...] |
assembler-cond-rd-memop-immediate-512-ldrsh-a32.h | 53 0xf0, 0x40, 0xdd, 0xe1 // ldrsh al r4 r13 plus 0 Offset 89 0xf0, 0xa0, 0xd3, 0xe1 // ldrsh al r10 r3 plus 0 Offset 92 0xf0, 0x70, 0xd9, 0xe1 // ldrsh al r7 r9 plus 0 Offset 116 0xf0, 0xd0, 0xde, 0xe1 // ldrsh al r13 r14 plus 0 Offset 128 0xf0, 0x50, 0xda, 0xe1 // ldrsh al r5 r10 plus 0 Offset 137 0xf0, 0x70, 0xdc, 0xe1 // ldrsh al r7 r12 plus 0 Offset 146 0xf0, 0x90, 0xde, 0xe1 // ldrsh al r9 r14 plus 0 Offset 173 0xf0, 0xc0, 0xd4, 0xe1 // ldrsh al r12 r4 plus 0 Offset 191 0xf0, 0x60, 0xd6, 0xe1 // ldrsh al r6 r6 plus 0 Offset 338 0xf8, 0x02, 0x5b, 0xe1 // ldrsh al r0 r11 minus 40 Offse [all...] |
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/HiKey/Include/Guid/ |
HiKeyVariable.h | 20 { 0x66b8d063, 0x1daa, 0x4c60, { 0xb9, 0xf2, 0x55, 0x0d, 0x7e, 0xe1, 0x2f, 0x38 } }
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/device/linaro/bootloader/edk2/EmbeddedPkg/Include/Guid/ |
PlatformHasAcpi.h | 30 { 0x96, 0x04, 0x0f, 0xf7, 0xe1, 0x11, 0x96, 0x5a } \
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/device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Guid/ |
SmmCommunicate.h | 28 0xf328e36c, 0x23b6, 0x4a95, {0x85, 0x4b, 0x32, 0xe1, 0x95, 0x34, 0xcd, 0x75 } \
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/device/linaro/bootloader/edk2/OvmfPkg/Include/Guid/ |
XenBusRootDevice.h | 20 {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
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/device/linaro/bootloader/edk2/QuarkPlatformPkg/Include/Protocol/ |
PlatformSmmSpiReady.h | 22 { 0x7a5dbc75, 0x5b2b, 0x4e67, 0xbd, 0xe1, 0xd4, 0x8e, 0xee, 0x76, 0x15, 0x62 }
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/external/capstone/suite/MC/AArch64/ |
neon-scalar-add-sub.s.cs | 3 0xe1,0x84,0xe8,0x7e = sub d1, d7, d8 package
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/external/llvm/test/MC/ARM/ |
load-store-acquire-release-v8.s | 8 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1] 9 @ CHECK: ldaexh r2, [r5] @ encoding: [0x9f,0x2e,0xf5,0xe1] 10 @ CHECK: ldaex r1, [r7] @ encoding: [0x9f,0x1e,0x97,0xe1] 11 @ CHECK: ldaexd r6, r7, [r8] @ encoding: [0x9f,0x6e,0xb8,0xe1] 21 @ CHECK: stlexb r1, r3, [r4] @ encoding: [0x93,0x1e,0xc4,0xe1] 22 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1] 23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1] 24 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1] 33 @ CHECK: lda r5, [r6] @ encoding: [0x9f,0x5c,0x96,0xe1] 34 @ CHECK: ldab r5, [r6] @ encoding: [0x9f,0x5c,0xd6,0xe1] [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
load-store-acquire-release-v8.s | 8 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1] 9 @ CHECK: ldaexh r2, [r5] @ encoding: [0x9f,0x2e,0xf5,0xe1] 10 @ CHECK: ldaex r1, [r7] @ encoding: [0x9f,0x1e,0x97,0xe1] 11 @ CHECK: ldaexd r6, r7, [r8] @ encoding: [0x9f,0x6e,0xb8,0xe1] 21 @ CHECK: stlexb r1, r3, [r4] @ encoding: [0x93,0x1e,0xc4,0xe1] 22 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1] 23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1] 24 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1] 33 @ CHECK: lda r5, [r6] @ encoding: [0x9f,0x5c,0x96,0xe1] 34 @ CHECK: ldab r5, [r6] @ encoding: [0x9f,0x5c,0xd6,0xe1] [all...] |