| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Guid/PeiApriori/ |
| PeiApriori.h | 31 { 0x1b45cc0a, 0x156a, 0x428a, {0xaf, 0x62, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6}}
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Guid/ |
| AprioriFileName.h | 24 { 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0XAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } }
|
| /external/capstone/suite/MC/Mips/ |
| micromips-movcond-instructions-EB.s.cs | 2 0x00,0xe6,0x48,0x58 = movz $9, $6, $7
3 0x00,0xe6,0x48,0x18 = movn $9, $6, $7 package
|
| micromips-movcond-instructions.s.cs | 2 0xe6,0x00,0x58,0x48 = movz $9, $6, $7
3 0xe6,0x00,0x18,0x48 = movn $9, $6, $7 package
|
| micromips-alu-instructions-EB.s.cs | 2 0x00,0xe6,0x49,0x10 = add $9, $6, $7
7 0x00,0xe6,0x49,0x50 = addu $9, $6, $7 package
8 0x00,0xe6,0x49,0x90 = sub $9, $6, $7 package
19 0x00,0xe6,0x4a,0x50 = and $9, $6, $7 package
27 0x00,0xe6,0x4a,0xd0 = nor $9, $6, $7 package
29 0x00,0xe6,0x4a,0x10 = mul $9, $6, $7 package
|
| micromips-alu-instructions.s.cs | 2 0xe6,0x00,0x10,0x49 = add $9, $6, $7
7 0xe6,0x00,0x50,0x49 = addu $9, $6, $7
8 0xe6,0x00,0x90,0x49 = sub $9, $6, $7 package
19 0xe6,0x00,0x50,0x4a = and $9, $6, $7 package
27 0xe6,0x00,0xd0,0x4a = nor $9, $6, $7 package
29 0xe6,0x00,0x10,0x4a = mul $9, $6, $7 package
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Include/Guid/ |
| CapsuleOnFatIdeDisk.h | 25 0xb38573b6, 0x6200, 0x4ac5, {0xb5, 0x1d, 0x82, 0xe6, 0x59, 0x38, 0xd7, 0x83 }\
|
| SystemNvDataHobGuid.h | 21 {0xd6e5092d, 0xc7b2, 0x4872, {0xaf, 0x66, 0xfd, 0xc0, 0xe6, 0xf9, 0x5e, 0x78}}
|
| /device/linaro/bootloader/edk2/ShellPkg/Include/Guid/ |
| ShellAliasGuid.h | 20 0x0053d9d6, 0x2659, 0x4599, { 0xa2, 0x6b, 0xef, 0x45, 0x36, 0xe6, 0x31, 0xa9 } \
|
| /external/capstone/suite/MC/ARM/ |
| arm_addrmode2.s.cs | 2 0x02,0x10,0xb0,0xe6 = ldrt r1, [r0], r2
3 0xa2,0x11,0xb0,0xe6 = ldrt r1, [r0], r2, lsr #3 package
5 0x02,0x10,0xf0,0xe6 = ldrbt r1, [r0], r2 package
6 0xa2,0x11,0xf0,0xe6 = ldrbt r1, [r0], r2, lsr #3 package
8 0x02,0x10,0xa0,0xe6 = strt r1, [r0], r2 package
9 0xa2,0x11,0xa0,0xe6 = strt r1, [r0], r2, lsr #3 package
11 0x02,0x10,0xe0,0xe6 = strbt r1, [r0], r2 package
12 0xa2,0x11,0xe0,0xe6 = strbt r1, [r0], r2, lsr #3 package
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| arm_addrmode2.s | 4 @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6]
5 @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
7 @ CHECK: ldrbt r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6]
8 @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
10 @ CHECK: strt r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6]
11 @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
13 @ CHECK: strbt r1, [r0], r2 @ encoding: [0x02,0x10,0xe0,0xe6]
14 @ CHECK: strbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6]
|
| /external/vixl/test/aarch32/traces/ |
| assembler-cond-rd-memop-rs-shift-amount-1to31-strb-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to31-ldr-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to31-ldrb-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to31-str-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to32-strb-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to32-ldr-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to32-ldrb-a32.h | [all...] |
| assembler-cond-rd-memop-rs-shift-amount-1to32-str-a32.h | [all...] |
| assembler-cond-rd-memop-rs-strb-a32.h | [all...] |
| assembler-cond-rd-memop-rs-ldr-a32.h | [all...] |
| /external/llvm/test/MC/Mips/ |
| micromips-movcond-instructions.s | 12 # CHECK-EL: movz $9, $6, $7 # encoding: [0xe6,0x00,0x58,0x48]
13 # CHECK-EL: movn $9, $6, $7 # encoding: [0xe6,0x00,0x18,0x48]
19 # CHECK-EB: movz $9, $6, $7 # encoding: [0x00,0xe6,0x48,0x58]
20 # CHECK-EB: movn $9, $6, $7 # encoding: [0x00,0xe6,0x48,0x18]
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/Ppi/ |
| PlatformMemorySize.h | 33 0x9a7ef41e, 0xc140, 0x4bd1, 0xb8, 0x84, 0x1e, 0x11, 0x24, 0xb, 0x4c, 0xe6 \
|
| /external/llvm/test/MC/ARM/ |
| arm_addrmode2.s | 4 @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6]
5 @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
8 @ CHECK: ldrbt r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6]
9 @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
12 @ CHECK: strt r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6]
13 @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
16 @ CHECK: strbt r1, [r0], r2 @ encoding: [0x02,0x10,0xe0,0xe6]
17 @ CHECK: strbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| arm_addrmode2.s | 4 @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6]
5 @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
8 @ CHECK: ldrbt r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6]
9 @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
12 @ CHECK: strt r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6]
13 @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
16 @ CHECK: strbt r1, [r0], r2 @ encoding: [0x02,0x10,0xe0,0xe6]
17 @ CHECK: strbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6]
|
