| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-readobj/ |
| MachODumper.cpp | 259 uint64_t Address;
311 Section.Address = Sect.addr;
323 Section.Address = Sect.addr;
457 W.printHex("Address", MOSection.Address);
575 // reason, even if one exists in the symtab at the correct address.
|
| /external/swiftshader/third_party/subzero/src/ |
| IceTargetLoweringX8632Traits.h | 129 Operand() : fixup_(nullptr), length_(0) {} // Needed by subclass Address.
183 class Address : public Operand {
184 Address() = delete;
187 Address(const Address &other) : Operand(other) {}
189 Address &operator=(const Address &other) {
194 Address(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) {
214 Address(GPRRegister Index, ScaleFactor Scale, int32_t Disp,
224 Address(GPRRegister Base, GPRRegister Index, ScaleFactor Scale
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Binary/AmdModulePkg/Common/ |
| Iscp.h | 82 UINT64 Address; ///< Address
83 UINT64 PhysicalAddress; ///< DRAM Physical Address
97 UINT64 BuffAddress; ///< 64-Bit Communication Buffer Address
175 /// Firmware MAC Address structure
177 UINT32 Version; ///< Version of MAC address Info Buffer structure
178 UINT8 MacAddress0[6]; ///< MAC Address 0 10Gb Ethernet port 0
179 UINT8 MacAddress1[6]; ///< MAC Address 1 10Gb Ethernet port 1
180 UINT8 MacAddress2[6]; ///< MAC Address 2 1Gb Ethernet
208 /// ISCP BMC IP Address structure
[all...] |
| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
| Acpi2_0.h | 53 // ACPI 2.0 Generic Address Space definition
60 UINT64 Address;
64 // Generic Address Space Address IDs
341 // Local APIC Address Override Structure
|
| Acpi3_0.h | 34 // ACPI 3.0 Generic Address Space definition
41 UINT64 Address;
45 // Generic Address Space Address IDs
55 // Generic Address Space Access Sizes
383 // Local APIC Address Override Structure
648 // "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
| Acpi2_0.h | 40 // ACPI 2.0 Generic Address Space definition
47 UINT64 Address;
51 // Generic Address Space Address IDs
328 // Local APIC Address Override Structure
|
| Acpi3_0.h | 40 // ACPI 3.0 Generic Address Space definition
47 UINT64 Address;
51 // Generic Address Space Address IDs
61 // Generic Address Space Access Sizes
390 // Local APIC Address Override Structure
655 // "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
|
| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| Acpi20.h | 51 /// ACPI 2.0 Generic Address Space definition
58 UINT64 Address;
62 // Generic Address Space Address IDs
354 /// Local APIC Address Override Structure
539 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
|
| Acpi30.h | 32 /// Extended Address Space Descriptor
67 /// ACPI 3.0 Generic Address Space definition
74 UINT64 Address;
78 // Generic Address Space Address IDs
88 // Generic Address Space Access Sizes
423 /// Local APIC Address Override Structure
688 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
|
| /device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/ |
| Pci.c | 1864 obtains its address space descriptors.
1868 @param[out] Descriptors Points to the address space descriptors.
1880 This function get the next bus range of given address space descriptors.
1884 @param[in, out] Descriptors Points to current position of a serial of address space
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/Msr/ |
| P6Msr.h | 189 /// [Bits 31:12] APIC Base Address.
488 Address register: used to send specified address (A31-A3) to L2 during cache
518 /// [Bits 31:3] Address bits
520 UINT32 Address:29;
724 /// [Bit 6] Address Parity Check Enable (read/write).
755 /// [Bits 22:20] L2 Physical Address Range support 64GBytes 32GBytes
[all...] |
| /external/grpc-grpc-java/services/src/generated/main/java/io/grpc/channelz/v1/ |
| Address.java | 8 * Address represents the address used to create the socket.
11 * Protobuf type {@code grpc.channelz.v1.Address}
13 public final class Address extends
15 // @@protoc_insertion_point(message_implements:grpc.channelz.v1.Address)
18 // Use Address.newBuilder() to construct.
19 private Address(com.google.protobuf.GeneratedMessageV3.Builder<?> builder) {
22 private Address() {
30 private Address(
57 io.grpc.channelz.v1.Address.TcpIpAddress.Builder subBuilder = null
[all...] |
| /external/llvm/include/llvm/ProfileData/ |
| InstrProf.h | 413 uint64_t Address;
421 // A map from function runtime address to function name MD5 hash.
427 : Data(), Address(0), NameTab(), MD5NameMap(), MD5FuncMap(),
434 /// the section base address. The decompression will be delayed
465 /// Map a function address to its name's MD5 hash. This interface
472 /// address in the object file. If an error occurs, return
490 Address = BaseAddr;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 790 llvm_unreachable("Unsupported callee address.");
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | 41 // All possible address modes.
42 class Address {
58 // Innocuous defaults for our address.
59 Address() : Kind(RegBase), Offset(0), GV(0) { Base.Reg = 0; }
127 bool computeAddress(const Value *Obj, Address &Addr);
128 bool computeCallAddress(const Value *V, Address &Addr);
129 void simplifyAddress(Address &Addr);
133 bool emitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
135 bool emitStore(MVT VT, unsigned SrcReg, Address Addr,
137 bool emitStore(MVT VT, unsigned SrcReg, Address &Addr
[all...] |
| MipsSEISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | 67 typedef struct Address {
80 // Innocuous defaults for our address.
81 Address()
85 } Address;
157 bool PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
160 bool PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr);
161 bool PPCComputeAddress(const Value *Obj, Address &Addr);
162 void PPCSimplifyAddress(Address &Addr, bool &UseOffset,
316 // Given a value Obj, create an Address object Addr that represents its
317 // address. Return false if we can't handle it
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 389 /// \brief Address-mode matching performs shift-of-and to and-of-shift
440 // If the other operand is a TLS address, we should fold it instead.
447 // if the block also has an access to a second TLS address this will save
494 /// Return true if call address is a load and it can be
554 /// Also try moving call address load from outside callseq_start to just
712 SDValue Address = N->getOperand(1);
718 // gs:0 (or fs:0 on X86-64) contains its own address.
720 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Address))
730 // Address space 258 is not handled here, because it is not used to
731 // address TLS areas
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| GVN.cpp | 826 // If the load and store are to the exact same address, they should have been
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| Local.cpp | 260 Value *Address = IBI->getAddress();
263 RecursivelyDeleteTriviallyDeadInstructions(Address, TLI);
581 // Zap anything that took the address of DestBB. Not doing this will give the
582 // address an invalid value.
[all...] |
| /external/python/cpython3/Lib/email/ |
| _header_value_parser.py | 286 token_type = 'address-list'
290 return [x for x in self if x.token_type=='address']
295 for x in self if x.token_type=='address'), [])
300 for x in self if x.token_type=='address'), [])
303 class Address(TokenList):
305 token_type = 'address'
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/Object/ |
| MachOFormat.h | 238 uint32_t Address;
251 uint64_t Address;
|
| /external/swiftshader/third_party/LLVM/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | 607 // [pointee type, address space]
864 // [pointee type, address space]
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMFastISel.cpp | 61 // All possible address modes, plus some.
62 typedef struct Address {
75 // Innocuous defaults for our address.
76 Address()
80 } Address;
176 bool ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr);
177 bool ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr);
178 bool ARMComputeAddress(const Value *Obj, Address &Addr);
179 void ARMSimplifyAddress(Address &Addr, EVT VT);
209 void AddLoadStoreOperands(EVT VT, Address &Addr
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 337 // If the other operand is a TLS address, we should fold it instead.
344 // if the block also has an access to a second TLS address this will save
393 /// isCalleeLoad - Return true if call address is a load and it can be
437 /// Also try moving call address load from outside callseq_start to just
586 SDValue Address = N->getOperand(1);
592 // gs:0 (or fs:0 on X86-64) contains its own address.
594 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Address))
739 // If this is already a %rip relative address, we can only merge immediates
743 // FIXME: JumpTable and ExternalSymbol address currently don't like
859 // Given A-B, if A can be completely folded into the address an
[all...] |
