| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.h | 558 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
579 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const;
596 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
605 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
628 virtual void LowerAsmOperandForConstraint(SDValue Op,
717 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
788 std::pair<SDValue,SDValue> FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
793 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
794 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
795 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 109 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
169 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
170 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
171 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
172 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
173 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
174 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
175 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
176 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
177 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 109 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
170 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
171 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
172 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
173 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
174 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
175 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
176 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
177 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
178 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.h | 73 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
79 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
80 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 84 TYPECAST, // No-op that's used to convert between different legal
89 // an address in a vector load, then it's a no-op.
148 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
154 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
155 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
156 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
157 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
158 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
159 SDValue LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
160 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitstreamReader.cpp | 55 const BitCodeAbbrevOp &Op) {
56 assert(!Op.isLiteral() && "Not to be used with literals!");
59 switch (Op.getEncoding()) {
64 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize);
65 return Cursor.Read((unsigned)Op.getEncodingData());
67 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize);
68 return Cursor.ReadVBR64((unsigned)Op.getEncodingData());
76 const BitCodeAbbrevOp &Op) {
77 assert(!Op.isLiteral() && "Not to be used with literals!");
80 switch (Op.getEncoding())
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.h | 33 /// \returns AMDGPUISD::FFBH_U32 node if the incoming \p Op may have been
37 SDValue getFFBX_U32(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, unsigned Opc) const;
40 static unsigned numBitsUnsigned(SDValue Op, SelectionDAG &DAG);
41 static unsigned numBitsSigned(SDValue Op, SelectionDAG &DAG);
46 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
51 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
52 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
53 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
54 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | [all...] |
| /external/google-fruit/include/fruit/impl/ |
| component.defn.h | 55 using Op = typename fruit::impl::meta::OpForComponent<Bindings...>::template ConvertTo<Comp>;
56 (void)typename fruit::impl::meta::CheckIfError<Op>::type();
60 fruit::impl::meta::Eval<fruit::impl::meta::CheckNoLoopInDeps(typename Op::Result)>>::type();
63 std::size_t num_entries = partial_component.storage.numBindings() + Op().numEntries();
66 Op()(entries);
90 using Op = OpFor<fruit::impl::Bind<AnnotatedI, AnnotatedC>>;
91 (void)typename fruit::impl::meta::CheckIfError<Op>::type();
100 using Op = OpFor<fruit::impl::RegisterConstructor<AnnotatedSignature>>;
101 (void)typename fruit::impl::meta::CheckIfError<Op>::type();
110 using Op = OpFor<fruit::impl::BindInstance<C, C>>
[all...] |
| /external/clang/lib/CodeGen/ |
| CGExprComplex.cpp | 150 ComplexPairTy EmitCast(CastKind CK, Expr *Op, QualType DestTy);
235 ComplexPairTy EmitBinAdd(const BinOpInfo &Op);
236 ComplexPairTy EmitBinSub(const BinOpInfo &Op);
237 ComplexPairTy EmitBinMul(const BinOpInfo &Op);
238 ComplexPairTy EmitBinDiv(const BinOpInfo &Op);
241 const BinOpInfo &Op);
423 ComplexPairTy ComplexExprEmitter::EmitCast(CastKind CK, Expr *Op,
428 // Atomic to non-atomic casts may be more than a no-op for some platforms and
435 return Visit(Op);
438 LValue origLV = CGF.EmitLValue(Op);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.h | 38 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
65 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
66 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
68 SDValue lowerMulDiv(SDValue Op, unsigned NewOpc, bool HasLo, bool HasHi,
71 SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
72 SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
73 SDValue lowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
74 SDValue lowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
75 SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
78 SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Bitcode/Reader/ |
| BitstreamReader.cpp | 52 const BitCodeAbbrevOp &Op) {
53 assert(!Op.isLiteral() && "Not to be used with literals!");
56 switch (Op.getEncoding()) {
61 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize);
62 return Cursor.Read((unsigned)Op.getEncodingData());
64 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize);
65 return Cursor.ReadVBR64((unsigned)Op.getEncodingData());
73 const BitCodeAbbrevOp &Op) {
74 assert(!Op.isLiteral() && "Not to be used with literals!");
77 switch (Op.getEncoding())
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
86 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
92 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
93 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
94 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.h | 104 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
133 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
134 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
135 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
136 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 77 const MCOperand &Op = MI->getOperand(OpNo);
78 if (Op.isReg()) {
79 printRegName(O, Op.getReg());
83 if (Op.isImm()) {
84 O << Op.getImm();
88 assert(Op.isExpr() && "unknown operand kind in printOperand");
89 printExpr(Op.getExpr(), &MAI, O);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 149 // Compiler barrier only; generate a no-op.
288 // ATOMIC_LOAD_<op>.
291 // Operand 1: the second operand of <op>, in the high bits of an i32
411 void LowerAsmOperandForConstraint(SDValue Op,
458 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
493 SDValue lowerSETCC(SDValue Op, SelectionDAG &DAG) const;
494 SDValue lowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
495 SDValue lowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
508 SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
509 SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.h | 28 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
30 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
33 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
34 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
35 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerFastFDIV(SDValue Op, SelectionDAG &DAG) const;
40 SDValue LowerFDIV32(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 123 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerEXTRACT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerINSERT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
133 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| LanaiInstPrinter.cpp | 149 const MCOperand &Op = MI->getOperand(OpNo);
150 if (Op.isReg())
151 OS << "%" << getRegisterName(Op.getReg());
152 else if (Op.isImm())
153 OS << formatHex(Op.getImm());
155 assert(Op.isExpr() && "Expected an expression");
156 Op.getExpr()->print(OS, &MAI);
162 const MCOperand &Op = MI->getOperand(OpNo);
163 if (Op.isImm()) {
164 OS << '[' << formatHex(Op.getImm()) << ']'
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/InstPrinter/ |
| LanaiInstPrinter.cpp | 149 const MCOperand &Op = MI->getOperand(OpNo);
150 if (Op.isReg())
151 OS << "%" << getRegisterName(Op.getReg());
152 else if (Op.isImm())
153 OS << formatHex(Op.getImm());
155 assert(Op.isExpr() && "Expected an expression");
156 Op.getExpr()->print(OS, &MAI);
162 const MCOperand &Op = MI->getOperand(OpNo);
163 if (Op.isImm()) {
164 OS << '[' << formatHex(Op.getImm()) << ']'
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/InstPrinter/ |
| ARCInstPrinter.cpp | 137 const MCOperand &Op = MI->getOperand(OpNum);
138 if (Op.isReg()) {
139 printRegName(O, Op.getReg());
143 if (Op.isImm()) {
144 O << Op.getImm();
148 assert(Op.isExpr() && "unknown operand kind in printOperand");
149 printExpr(Op.getExpr(), &MAI, O);
165 const MCOperand &Op = MI->getOperand(OpNum);
166 assert(Op.isImm() && "Predicate operand is immediate.");
167 O << ARCCondCodeToString((ARCCC::CondCode)Op.getImm())
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
81 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-cov/ |
| CoverageFilters.h | 85 Operation Op;
88 StatisticThresholdFilter(Operation Op, T Threshold)
89 : Op(Op), Threshold(Threshold) {}
94 switch (Op) {
109 RegionCoverageFilter(Operation Op, double Threshold)
110 : StatisticThresholdFilter(Op, Threshold) {}
121 LineCoverageFilter(Operation Op, double Threshold)
122 : StatisticThresholdFilter(Op, Threshold) {}
|
| /external/swiftshader/third_party/subzero/pnacl-llvm/ |
| NaClBitCodes.cpp | 78 const NaClBitCodeAbbrevOp &Op = Abbrev->getOperandInfo(Index);
79 Op.Print(Stream);
80 if (unsigned NumArgs = Op.NumArguments()) {
104 const NaClBitCodeAbbrevOp &Op = OperandList[i];
108 // Op Array(Op) -> Array(Op)
109 assert(!Op.isArrayOp() || i == OperandList.size()-2);
110 while (Op.isArrayOp() && !Abbrev->OperandList.empty() &&
114 Abbrev->OperandList.push_back(Op);
[all...] |
