/external/mesa3d/src/gallium/tests/graw/vertex-shader/ |
vert-rsq.sh | 15 SUB OUT[0], TEMP[0], IMM[1]
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/external/libxaac/decoder/armv8/ |
ixheaacd_imdct_using_fft.s | 139 SUB X5, X5, X1, LSL #1 143 SUB X5, X5, X1, LSL #2 150 SUB X6, X6, X1, LSL #1 154 SUB X6, X6, X1, LSL #2 162 SUB X7, X7, X1, LSL #1 169 SUB X11, X11, X1, LSL #1 177 SUB v9.4S, v0.4S, v4.4S 179 SUB X7, X7, X1, LSL #2 186 SUB v4.4S, v1.4S, v5.4S 188 SUB X11, X11, X1, LSL # [all...] |
ixheaacd_sbr_imdct_using_fft.s | 109 SUB X5, X5, X1, LSL #1 113 SUB X5, X5, X1, LSL #2 120 SUB X6, X6, X1, LSL #1 124 SUB X6, X6, X1, LSL #2 132 SUB X7, X7, X1, LSL #1 139 SUB X11, X11, X1, LSL #1 147 SUB V9.4S, V0.4S, V4.4S 149 SUB X7, X7, X1, LSL #2 156 SUB V4.4S, V1.4S, V5.4S 158 SUB X11, X11, X1, LSL # [all...] |
/external/libxaac/decoder/armv7/ |
ixheaacd_mps_complex_fft_64_asm.s | 9 SUB sp, sp, #0x44 13 SUB r12, r0, #16 @dig_rev_shift = norm32(npoints) + 1 -16@ 14 SUB r0, r0, #1 41 SUB r6, r4, r6, lsl#1 @x2r = x0r - (x2r << 1)@ 42 SUB r7, r5, r7, lsl#1 @x2i = x0i - (x2i << 1)@ 45 SUB r1, r8, r10, lsl#1 @x3r = x1r - (x3r << 1)@ 46 SUB r11, r9, r11, lsl#1 @x3i = x1i - (x3i << 1)@ 50 SUB r8, r4, r8, lsl#1 @x1r = x0r - (x1r << 1)@ 51 SUB r9, r5, r9, lsl#1 @x1i = x0i - (x1i << 1) 53 SUB r7, r7, r1 @x2i = x2i - x3r [all...] |
ixheaacd_conv_ergtoamplitude.s | 43 SUB R8, R8, #17 44 SUB R7, R7, R8 71 SUB R8, R8, #17 72 SUB R7, R7, R8 99 SUB R8, R8, #17 100 SUB R7, R7, R8 117 SUB R6, R1, R9
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ixheaacd_conv_ergtoamplitudelp.s | 44 SUB R8, R8, #17 45 SUB R7, R7, R8 70 SUB R8, R8, #17 71 SUB R7, R7, R8 98 SUB R8, R8, #17 99 SUB R7, R7, R8 114 SUB R6, R1, R9
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ixheaacd_esbr_radix4bfly.s | 28 SUB sp, sp, #16 57 SUB r11, r6, r8 59 SUB r14, r7, r9 62 SUB r7, r10, r12 71 SUB r8, r8, r9 73 SUB r6, r6, r10 77 SUB r12, r12, r9 80 SUB r10, r11, r6 84 SUB r6, r8, r14 141 SUB r0, r0, r8, lsl # [all...] |
ixheaacd_tns_ar_filter_fixed_32x16.s | 29 SUB sp, sp, #4 75 SUB r5 , r4 , r7 87 SUB r8 , r8 , r11, lsl #1 114 SUB r5 , r5 , #4 121 SUB r5 , r5 , #4 136 SUB r8 , r8 , r11, lsl #1 176 SUB r8 , r8 , r11, lsl #1 203 SUB r5 , r4 , r7 215 SUB r8 , r8 , r11, lsl #1 239 SUB r5 , r5 , # [all...] |
ixheaacd_esbr_cos_sin_mod_loop1.s | 32 SUB r4, r4, #4 34 SUB r5, r5, #8 47 SUB r4, r4, #4 73 SUB r4, r4, #4 76 VMULL.S32 q3, d0, d3 @sub 2nd 77 VMULL.S32 q4, d1, d2 @sub 1st 89 SUB r5, r5, #8 99 SUB r4, r4, #4 125 SUB r4, r4, #4 128 VMULL.S32 q3, d0, d3 @sub 2n [all...] |
ixheaacd_enery_calc_per_subband.s | 34 SUB R12, R3, R2 57 SUB R2, R3, R2 66 SUB R2, R3, R2 69 SUB R1, R1, #1 127 SUB R14, R14, #23
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ixheaacd_autocorr_st2.s | 57 SUB r9 , r9 , r10 78 SUB r14, r3 , #2 93 SUB r9 , r9 , r0 109 SUB r9 , r9 , r0 129 SUB r9 , r9 , r0 153 SUB r10, r3, #2 230 SUB r9 , r9 , r8 239 SUB r10, r10, r8 289 SUB r3 , r3 , r14 309 SUB r3 , r3 , r1 [all...] |
ixheaacd_expsubbandsamples.s | 31 SUB r11, r3, r2 46 SUB r10, r10, r7 110 SUB r0, r0, #1
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/external/libhevc/common/arm64/ |
ihevc_sao_edge_offset_class3.s | 94 SUB x9,x7,#1 //wd - 1 100 SUB sp,sp,#0xA0 //Decrement the stack pointer to store some temp arr values 103 SUB x10,x8,#1 //ht-1 116 SUB x10,x7,#1 //[wd - 1] 121 SUB x10,x10,#1 //[wd - 1 - 1] 124 SUB x12,x9,x11 //pu1_src[wd - 1] - pu1_src_top_right[0] 132 SUB x11,x9,x14 //pu1_src[wd - 1] - pu1_src[wd - 1 - 1 + src_strd] 160 SUB x11,x8,#1 //ht - 1 169 SUB x11,x12,x1 //pu1_src[(ht - 1) * src_strd) - src_strd] 175 SUB x14,x10,x14 //pu1_src[(ht - 1) * src_strd] - pu1_src_bot_left[0 [all...] |
ihevc_sao_edge_offset_class2.s | 87 SUB x9,x7,#1 //wd - 1 100 SUB sp,sp,#0xA0 //Decrement the stack pointer to store some temp arr values 103 SUB x10,x8,#1 //ht-1 156 SUB x10,x7,#1 //wd - 1 157 SUB x11,x8,#1 //ht - 1 163 SUB x4,x12,x1 //pu1_src[(wd - 1 + (ht - 1) * src_strd) - src_strd] 164 SUB x4,x4,#1 211 SUB x20,x12,#1 //ht_tmp-- 223 SUB x20,x12,#1 //ht_tmp-- 258 SUB x20,x0,x1 //pu1_src - src_str [all...] |
ihevc_sao_edge_offset_class0.s | 86 SUB x11,x11,#1 101 SUB x4,x10,#1 //(ht - 1) 146 SUB x5,x9,x8 //wd - col 148 SUB x14,x10,x4 //ht - row 160 SUB x4,x4,#1 164 SUB x12,x12,x1 //Decrement the pu1_src pointer by src_strd 165 SUB v20.16b, v18.16b , v16.16b //sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 170 SUB x5,x9,x8 //II wd - col 178 SUB x14,x10,x4 //II ht - row 182 SUB x12,x12,x1 //Decrement the pu1_src pointer by src_str [all...] |
ihevc_inter_pred_chroma_copy.s | 107 SUB x5,x5,x8 //check the rounded height value 112 SUB x11,x12,#4 138 SUB x0,x7,x11 //pu1_src = pu1_src_tmp 139 SUB x1,x6,x11 //pu1_dst = pu1_dst_tmp 165 SUB x11,x12,#8 190 SUB x0,x7,x11 //pu1_src = pu1_src_tmp 191 SUB x1,x6,x11 //pu1_dst = pu1_dst_tmp 211 SUB x11,x12,#16 235 SUB x0,x7,x11 //pu1_src = pu1_src_tmp 236 SUB x1,x6,x11 //pu1_dst = pu1_dst_tm [all...] |
ihevc_sao_edge_offset_class3_chroma.s | 100 SUB x9,x7,#2 //wd - 2 111 SUB sp,sp,#0xE0 //Decrement the stack pointer to store some temp arr values 114 SUB x10,x8,#1 //ht-1 127 SUB x14,x7,#2 //[wd - 2] 129 SUB x11,x7,#1 //[wd - 1] 135 SUB x12,x9,x11 //pu1_src[wd - 2] - pu1_src_top_right[0] 142 SUB x14,x14,#2 //[wd - 2 - 2] 144 SUB x11,x9,x14 //pu1_src[wd - 2] - pu1_src[wd - 2 - 2 + src_strd] 171 SUB x12,x10,x11 //pu1_src[wd - 1] - pu1_src_top_right[1] 178 SUB x14,x7,#3 //[wd - 1 - 2 [all...] |
ihevc_sao_edge_offset_class2_chroma.s | 101 SUB x9,x7,#2 //wd - 2 114 SUB sp,sp,#0xE0 //Decrement the stack pointer to store some temp arr values 117 SUB x10,x8,#1 //ht-1 137 SUB x12,x9,x11 //pu1_src[0] - pu1_src_top_left[0] 144 SUB x11,x9,x14 //pu1_src[0] - pu1_src[2 + src_strd] 177 SUB x12,x10,x11 //pu1_src[1] - pu1_src_top_left[1] 183 SUB x11,x10,x14 //pu1_src[1] - pu1_src[3 + src_strd] 217 SUB x10,x7,#2 //wd - 2 218 SUB x11,x8,#1 //ht - 1 225 SUB x11,x12,x1 //pu1_src[(wd - 2 + (ht - 1) * src_strd) - src_strd [all...] |
ihevc_sao_band_offset_chroma.s | 104 SUB x12,x12,#2 //wd-2 117 sub x23,x12,#2 126 SUB x4,x10,#1 //ht-1 313 SUB v7.8b, v5.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 316 SUB v8.8b, v6.8b , v30.8b //vsub_u8(au1_cur_row_deint.val[1], band_pos_v) 319 SUB v15.8b, v13.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 322 SUB v16.8b, v14.8b , v30.8b //vsub_u8(au1_cur_row_deint.val[1], band_pos_v) 325 SUB v19.8b, v17.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 328 SUB v20.8b, v18.8b , v30.8b //vsub_u8(au1_cur_row_deint.val[1], band_pos_v) 331 SUB v23.8b, v21.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u [all...] |
ihevc_sao_edge_offset_class1.s | 82 SUB x9,x7,#1 //wd - 1 95 SUB x12,x8,#1 //ht - 1 103 SUB x20,x8,#1 //ht-- 108 SUB x20,x8,#1 //ht-- 125 SUB x20,x0,x1 //pu1_src -= src_strd 140 SUB v16.16b, v17.16b , v5.16b //sign_up = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 152 SUB x10,x10,x1 154 SUB v20.16b, v17.16b , v5.16b //sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 167 SUB v1.16b, v24.16b , v22.16b //II sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt)) 225 SUB v20.16b, v17.16b , v5.16b //sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt) [all...] |
/external/mockftpserver/MockFtpServer/src/test/groovy/org/mockftpserver/fake/command/ |
RmdCommandHandlerTest.groovy | 46 def SUB = "sub" 47 createDirectory(p(DIR, SUB)) 49 handleCommand([SUB]) 50 assertSessionReply(ReplyCodes.RMD_OK, ['rmd', SUB]) 51 assert fileSystem.exists(p(DIR, SUB)) == false
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/external/tremolo/Tremolo/ |
mdctLARM.s | 57 SUB r1, r2, r1 @ r1 = r - post 116 SUB r1, r1, r2 @ r1 = post - l 245 SUB r6, r6, r11 315 SUB r4, r4, #3*4 @ r4 = aX = in+n2-3 365 SUB r4, r4, #4*4 @ r4 = aX = in+(n>>1)-4 403 SUB r1,r1,r0 @ r1 = in -= n>>2 (i.e. restore in) 451 SUB r2, r2, r3 @ r2 = s0 = x1[0] - x1[1] 453 SUB r11,r11,r8 @ r11= s1 = x1[3] - x1[2] 455 SUB r9, r9, r4 @ r9 = s2 = x2[1] - x2[0] 457 SUB r14,r14,r10 @ r14= s3 = x2[3] - x2[2 [all...] |
/external/tensorflow/tensorflow/core/kernels/ |
dense_update_functor_gpu.cu.cc | 47 struct DenseUpdate<GPUDevice, T, SUB> { 58 template struct functor::DenseUpdate<GPUDevice, T, SUB>;
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dense_update_functor.h | 34 enum DenseUpdateType { ADD, SUB, ASSIGN }; 53 struct DenseUpdate<CPUDevice, T, SUB> { 78 struct DenseUpdate<SYCLDevice, T, SUB> {
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
convolve_neon.s | 45 SUB r5, r5, #1 52 SUB r4, r4, #8 81 SUB r5, r5, #2 88 SUB r4, r4, #8 119 SUB r5, r5, #3 126 SUB r4, r4, #8 152 SUB r4, r4, #8
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