| /external/u-boot/arch/arm/mach-at91/include/mach/ |
| atmel_pio4.h | 15 u32 pdsr; /* 0x08 PIO Pin Data Status Register */
75 int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config);
76 int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config);
77 int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 config);
78 int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 config);
79 int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 config);
80 int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 config);
81 int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 config);
82 int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 config);
83 int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)
[all...] |
| /device/google/contexthub/firmware/os/drivers/hall/ |
| hall.c | 52 struct Gpio *pin; member in struct:SensorTask
68 bool pinState = gpioGet(mTask.pin);
86 bool pinState = gpioGet(data->pin);
88 if (!extiIsPendingGpio(data->pin)) {
100 extiClearPendingGpio(data->pin);
104 static bool enableInterrupt(struct Gpio *pin, struct ChainedIsr *isr)
106 gpioConfigInput(pin, GPIO_SPEED_LOW, GPIO_PULL_NONE);
107 syscfgSetExtiPort(pin);
108 extiEnableIntGpio(pin, EXTI_TRIGGER_BOTH);
113 static bool disableInterrupt(struct Gpio *pin, struct ChainedIsr *isr
[all...] |
| /external/u-boot/drivers/gpio/ |
| atmel_pio4.c | 45 static int atmel_pio4_config_io_func(u32 port, u32 pin,
51 if (pin >= ATMEL_PIO_NPINS_PER_BANK)
58 mask = 1 << pin;
68 int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config)
70 return atmel_pio4_config_io_func(port, pin,
75 int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config)
77 return atmel_pio4_config_io_func(port, pin,
82 int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 config)
84 return atmel_pio4_config_io_func(port, pin,
89 int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 config
[all...] |
| dwapb_gpio.c | 39 static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
43 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
47 static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
52 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
55 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
57 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
62 static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
65 return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin));
69 static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
74 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
[all...] |
| db8500_gpio.c | 37 #define GPIO_BLOCK(pin) (((pin + GPIO_PINS_PER_BLOCK) >> 5) - 1)
38 #define GPIO_PIN_WITHIN_BLOCK(pin) ((pin)%(GPIO_PINS_PER_BLOCK))
103 * @gpio: pin number
107 * Enables/disables pull up/down on a specified pin. This only takes effect if
108 * the pin is configured as an input (either explicitly or by the alternate
113 * work, this function will change the value output on the pin.
176 * config_pin - configure a pin's mux attributes
177 * @cfg: pin configuratio
191 int pin = PIN_NUM(cfg); local
[all...] |
| /external/u-boot/include/ |
| ali512x.h | 30 void ali512x_cio_function(int pin, int special, int inv, int input);
31 void ali512x_cio_out(int pin, int value);
32 int ali512x_cio_in(int pin);
|
| /external/wpa_supplicant_8/wpa_supplicant/examples/ |
| openCryptoki.conf | 6 # Please enter User PIN:
38 # set the PIN code; leave this out to configure the PIN to be requested
40 pin="123456"
|
| /external/u-boot/arch/arm/cpu/arm926ejs/mx27/ |
| generic.c | 208 unsigned int pin = gpio_mode & GPIO_PIN_MASK; local
217 writel(readl(®s->port[port].puen) | (1 << pin),
220 writel(readl(®s->port[port].puen) & ~(1 << pin),
226 writel(readl(®s->port[port].gpio_dir) | 1 << pin,
229 writel(readl(®s->port[port].gpio_dir) & ~(1 << pin),
235 writel(readl(®s->port[port].gpr) | (1 << pin),
238 writel(readl(®s->port[port].gpr) & ~(1 << pin),
244 writel(readl(®s->port[port].gius) | (1 << pin),
247 writel(readl(®s->port[port].gius) & ~(1 << pin),
252 if (pin < 16)
[all...] |
| /external/u-boot/drivers/pinctrl/uniphier/ |
| pinctrl-uniphier-core.c | 34 * We do not list all pins in the pin table to save memory footprint.
35 * Report the max pin number + 1 to fake the framework.
92 unsigned int pin, int enable)
98 reg = UNIPHIER_PINCTRL_IECTRL + pin / 32 * 4;
99 mask = BIT(pin % 32);
112 unsigned int pin, int enable)
117 * Multiple pins share one input enable, per-pin disabling is
123 /* Set all bits instead of having a bunch of pin data */
130 unsigned int pin, int enable)
135 return uniphier_pinconf_input_enable_perpin(dev, pin, enable)
[all...] |
| /external/okhttp/samples/guide/src/main/java/com/squareup/okhttp/recipes/ |
| CheckHandshake.java | 35 String pin = CertificatePinner.pin(certificate);
36 if (blacklist.contains(pin)) {
37 throw new IOException("Blacklisted peer certificate: " + pin);
|
| /external/u-boot/drivers/misc/ |
| ali512x.c | 209 * CIO Pin Function Decription
257 * The pin function is accessed through normal
328 void ali512x_cio_function(int pin, int special, int inv, int input)
334 if (pin >= 10 && pin <= 17) {
335 addr = 0xe0+(pin&7);
336 } else if (pin >= 20 && pin <= 25) {
337 addr = 0xe8+(pin&7);
338 } else if (pin >= 30 && pin <= 37)
[all...] |
| /external/u-boot/arch/arm/mach-uniphier/ |
| sg-regs.h | 61 /* Pin Control */
70 /* Pin Monitor */
92 .macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd variable
93 ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
95 and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
96 orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
105 static inline void sg_set_pinsel(unsigned pin, unsigned muxval,
108 unsigned shift = pin * mux_bits % 32;
109 unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
119 static inline void sg_set_iectrl(unsigned pin)
[all...] |
| /external/u-boot/arch/x86/cpu/broadwell/ |
| pinctrl_broadwell.c | 126 /* There are three cells per pin */
167 struct pin_info *pin = &pin_info[confnum]; local
170 val = pin->mode_gpio << CONFA_MODE_SHIFT |
171 pin->dir_input << CONFA_DIR_SHIFT |
172 pin->invert << CONFA_INVERT_SHIFT |
173 pin->trigger_level << CONFA_TRIGGER_SHIFT |
174 pin->output_high << CONFA_OUTPUT_SHIFT;
176 outl(pin->sense_disable << CONFB_SENSE_SHIFT,
184 owner_gpio[set] |= pin->owner_gpio << bit;
185 route_smi[set] |= pin->route_smi << bit
[all...] |
| /external/wpa_supplicant_8/wpa_supplicant/examples/p2p/ |
| p2p_connect.py | 19 print(" -a <addr> [-p <pin>] [-g <go_intent>] \ ")
25 print(" -p = pin number (8 digits)")
66 global pin
79 pin,wps_method,go_intent):
86 self.pin = pin
155 # Display requires a pin, and a go intent of 15
157 if (self.pin != None):
158 self.p2p_connect_arguements.update({'pin':self.pin})
228 pin = None variable in class:P2P_Connect
[all...] |
| /external/u-boot/arch/arm/dts/ |
| armada-xp-synology-ds414.dts | 159 * pin being sampled at reset (bit 0 of SAR).
273 sata1_pwr_pin: sata1-pwr-pin {
278 sata2_pwr_pin: sata2-pwr-pin {
283 sata3_pwr_pin: sata3-pwr-pin {
288 sata4_pwr_pin: sata4-pwr-pin {
293 sata1_pres_pin: sata1-pres-pin {
298 sata2_pres_pin: sata2-pres-pin {
303 sata3_pres_pin: sata3-pres-pin {
308 sata4_pres_pin: sata4-pres-pin {
313 syno_id_bit0_pin: syno-id-bit0-pin {
[all...] |
| stih410-pinctrl.dtsi | 13 pin-controller-rear {
|
| /external/u-boot/drivers/pinctrl/ |
| Kconfig | 5 menu "Pin controllers"
8 bool "Support pin controllers"
15 bool "Support full pin controllers"
31 bool "Support generic pin controllers"
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
45 bool "Support pin multiplexing controllers"
49 This option enables pin multiplexing through the generic pinctrl
51 a single pin can be used for several functions. An SoC pinctrl drive
[all...] |
| pinctrl-at91.c | 72 * @mux_A_periph: assign the corresponding pin to the peripheral A function.
73 * @mux_B_periph: assign the corresponding pin to the peripheral B function.
74 * @mux_C_periph: assign the corresponding pin to the peripheral C function.
75 * @mux_D_periph: assign the corresponding pin to the peripheral D function.
91 void (*set_drivestrength)(struct at91_port *pio, u32 pin,
95 static u32 two_bit_pin_value_shift_amount(u32 pin)
97 /* return the shift value for a pin for "two bit" per pin registers,
99 return 2 * ((pin >= MAX_NB_GPIO_PER_BANK/2)
100 ? pin - MAX_NB_GPIO_PER_BANK/2 : pin)
370 u32 bank, pin; local
[all...] |
| /external/okhttp/okhttp/src/main/java/com/squareup/okhttp/ |
| CertificatePinner.java | 46 * The easiest way to pin a host is turn on pinning with a broken configuration
52 * <p>For example, to pin {@code https://publicobject.com}, start with a broken
95 * Pinning is per-hostname and/or per-wildcard pattern. To pin both
126 * {@link CertificatePinner} can not be used to pin self-signed certificate
162 // If we couldn't find a matching pin, format a nice exception.
168 message.append("\n ").append(pin(x509Certificate))
172 for (ByteString pin : pins) {
173 message.append("\n sha1/").append(pin.base64());
222 public static String pin(Certificate certificate) { method in class:CertificatePinner
241 * @param pins SHA-1 hashes. Each pin is a SHA-1 hash of
[all...] |
| /external/okhttp/repackaged/okhttp/src/main/java/com/android/okhttp/ |
| CertificatePinner.java | 47 * The easiest way to pin a host is turn on pinning with a broken configuration
53 * <p>For example, to pin {@code https://publicobject.com}, start with a broken
96 * Pinning is per-hostname and/or per-wildcard pattern. To pin both
127 * {@link CertificatePinner} can not be used to pin self-signed certificate
164 // If we couldn't find a matching pin, format a nice exception.
170 message.append("\n ").append(pin(x509Certificate))
174 for (ByteString pin : pins) {
175 message.append("\n sha1/").append(pin.base64());
224 public static String pin(Certificate certificate) { method in class:CertificatePinner
244 * @param pins SHA-1 hashes. Each pin is a SHA-1 hash of
[all...] |
| /external/u-boot/drivers/led/ |
| led_bcm6358.c | 36 uint8_t pin; member in struct:bcm6358_led_priv
50 return (readl_be(priv->regs + LED_MODE_REG) >> priv->pin) &
59 (LED_MODE_MASK << priv->pin),
60 (mode << priv->pin));
151 unsigned int pin; local
157 pin = dev_read_u32_default(dev, "reg", LEDS_MAX);
158 if (pin >= LEDS_MAX)
161 priv->pin = pin;
|
| /external/u-boot/drivers/video/sunxi/ |
| sunxi_lcd.c | 28 int pin; local
30 for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(21); pin++) {
31 sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0);
32 sunxi_gpio_set_drv(pin, 3);
|
| /external/wpa_supplicant_8/wpa_supplicant/hidl/1.2/ |
| misc_utils.h | 58 // Returns a string holding the wps pin.
59 inline std::string convertWpsPinToString(int pin)
62 snprintf(pin_str, sizeof(pin_str), "%08d", pin);
|
| /external/u-boot/arch/arm/include/asm/arch-mx31/ |
| clock.h | 30 extern void mx31_set_pad(enum iomux_pins pin, u32 config);
|
| /external/u-boot/arch/x86/include/asm/ |
| irq.h | 61 int pin; member in struct:pirq_routing
|
