| /external/u-boot/include/ |
| ioports.h | 13 unsigned int ppar; /* Port Pin Assignment Register (35-4) */
34 * information for one port pin
38 unsigned char ppar:1; /* Port Pin Assignment Register (35-4) */
48 * NOTE: in the second dimension of this table, index 0 refers to pin 31
49 * and index 31 refers to pin 0. this made the code in the table look more
56 unsigned char pin; member in struct:__anon47763
|
| /external/u-boot/arch/arm/include/asm/arch-tegra/ |
| pinmux.h | 14 /* The pullup/pulldown state of a pin group */
21 /* Defines whether a pin group is tristated or in normal operation */
76 /* Defines a pin group cfg's low-power mode select */
87 /* Defines whether a pin group cfg's schmidt is enabled or not */
96 /* Defines whether a pin group cfg's high-speed mode is enabled or not */
105 * This defines the configuration for a pin, including the function assigned,
107 * you can call pinmux_config_pingroup() to configure a pin in one step. Also
111 u32 pingrp:16; /* pin group PMUX_PINGRP_... */
148 /* Set the mux function for a pin group */
149 void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func)
[all...] |
| /external/u-boot/drivers/pinctrl/renesas/ |
| pfc.c | 3 * Pin Control driver for SuperH Pin Function Controller.
60 int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
68 if (pin <= range->end)
69 return pin >= range->start
70 ? offset + pin - range->start : -1;
338 sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
345 if (pfc->info->bias_regs[i].pins[j] == pin) {
352 WARN_ONCE(1, "Pin %u is not in bias info list\n", pin);
467 const struct sh_pfc_pin *pin = NULL; local
496 const struct sh_pfc_pin *pin = &priv->pfc.info->pins[pin_selector]; local
610 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; local
707 const struct sh_pfc_pin *pin = &pfc->info->pins[pin_selector]; local
[all...] |
| /external/u-boot/drivers/led/ |
| led_bcm6328.c | 174 unsigned int pin; local
180 pin = dev_read_u32_default(dev, "reg", LEDS_MAX);
181 if (pin >= LEDS_MAX)
184 if (pin < 8) {
187 priv->shift = (pin << 1);
191 priv->shift = ((pin - 8) << 1);
|
| /external/u-boot/drivers/video/sunxi/ |
| sunxi_display.c | 548 int pin, reset_pin; local
554 pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_BL_EN);
555 if (pin >= 0) {
556 gpio_request(pin, "lcd_backlight_enable");
557 gpio_direction_output(pin, 0);
560 pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_BL_PWM);
561 if (pin >= 0) {
562 gpio_request(pin, "lcd_backlight_pwm");
563 gpio_direction_output(pin, PWM_OFF);
574 pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_POWER)
586 int pin; local
649 int clk_div, clk_double, pin; local
871 int pin; local
[all...] |
| /external/u-boot/include/configs/ |
| vct.h | 166 int vct_gpio_dir(int pin, int dir);
167 void vct_gpio_set(int pin, int val);
168 int vct_gpio_get(int pin);
|
| /external/autotest/client/site_tests/kernel_Lmbench/ |
| kernel_Lmbench.py | 64 To improve determinism, we sometimes use taskset to pin to a CPU and
|
| /external/autotest/server/cros/ |
| usb_mux_controller.py | 23 # Values passed to each GPIO pin to enable a specific port.
89 def enable_gpio_pins(self, pin):
91 Enables the given GPIO pin by exporting the pin and setting the
94 @param pin: GPIO pin to be enabled.
97 if 'gpio' + pin not in self.host.servo.system_output(LS_GPIO_DIRECTORY):
98 self.host.servo.system(EXPORT_GPIO_PIN % pin)
99 self.host.servo.system(SET_GPIO_DIRECTION % pin)
|
| /external/u-boot/include/faraday/ |
| ftpci100.h | 77 unsigned int pin; member in struct:pci_config
|
| /external/u-boot/drivers/gpio/ |
| sunxi_gpio.c | 32 static int sunxi_gpio_output(u32 pin, u32 val)
35 u32 bank = GPIO_BANK(pin);
36 u32 num = GPIO_NUM(pin);
50 static int sunxi_gpio_input(u32 pin)
53 u32 bank = GPIO_BANK(pin);
54 u32 num = GPIO_NUM(pin);
101 long pin; local
112 pin = simple_strtol(name, &eptr, 10);
115 if (pin < 0 || pin > groupsize || group >= 9
[all...] |
| 74x164_gpio.c | 26 * @oe: OE pin
66 uint pin = offset % 8; local
68 return (priv->buffer[bank] >> pin) & 0x1;
76 uint pin = offset % 8; local
80 priv->buffer[bank] |= 1 << pin;
82 priv->buffer[bank] &= ~(1 << pin);
|
| /external/u-boot/drivers/pinctrl/ |
| pinctrl_pic32.c | 36 /* pin configuration descriptor */
39 u16 pin; /* pin number in the port */ member in struct:pic32_pin_config
43 {.port = (_prt), .pin = (_pin), .config = (_cfg), }
45 /* In PIC32 muxing is performed at pin-level through two
48 * Pin configuration is handled through port register.
118 struct pic32_reg_port *pinconf; /* pin configuration*/
136 u32 port_nr, u32 pin, u32 param)
143 writel(BIT(pin), &port->ansel.clr);
146 writel(BIT(pin), &port->ansel.set)
[all...] |
| /external/u-boot/arch/arm/dts/ |
| stm32f429-pinctrl.dtsi | 48 pinctrl: pin-controller {
|
| stm32f469-pinctrl.dtsi | 48 pinctrl: pin-controller {
|
| /external/autotest/client/cros/cellular/pseudomodem/ |
| sim.py | 47 such as PIN unlocking.
110 pin=DEFAULT_PIN,
129 'code' : pin,
322 def SendPin(self, pin):
324 Sends the PIN to unlock the SIM card.
326 @param pin: A string containing the PIN code.
345 self._CheckCode(pin, lock_data, mm1_constants.MM_MODEM_LOCK_SIM_PUK,
348 logging.info('Entered correct PIN.')
358 def SendPuk(self, puk, pin)
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| sb_ra_coalesce.cpp | 63 c->pin = v->pin_gpr;
86 c1->pin = sel_chan(c1->pin.sel(), c2->pin.chan());
91 c1->pin = sel_chan(c2->pin.sel(), c1->pin.chan());
116 c1->pin.chan() != c2->pin.chan())
120 c1->pin.sel() != c2->pin.sel()
[all...] |
| /external/wpa_supplicant_8/wpa_supplicant/ |
| wps_supplicant.h | 35 const char *pin, int p2p_group, u16 dev_pw_id);
39 const char *pin, struct wps_new_ap_settings *settings);
53 const char *uuid, const char *pin);
56 const char *pin);
60 const char *pin, struct wps_new_ap_settings *settings);
|
| /external/u-boot/board/gdsys/mpc8308/ |
| hrcon.c | 236 void fpga_gpio_set(unsigned int bus, int pin)
238 FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.set, pin);
241 void fpga_gpio_clear(unsigned int bus, int pin)
243 FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.clear, pin);
246 int fpga_gpio_get(unsigned int bus, int pin)
252 return val & pin;
255 void fpga_control_set(unsigned int bus, int pin)
260 FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val | pin);
263 void fpga_control_clear(unsigned int bus, int pin)
268 FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val & ~pin);
[all...] |
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| filterbanks.c | 158 void WebRtcIsacfix_SplitAndFilter1(int16_t *pin,
175 WebRtcIsacfix_HighpassFilterFixDec32(pin, FRAMESAMPLES, WebRtcIsacfix_kHpStCoeffInQ30, prefiltdata->HPstates_fix);
180 tempin_ch1[QLOOKAHEAD + k] = pin[1 + 2 * k];
184 prefiltdata->INLABUF1_fix[k] = pin[FRAMESAMPLES + 1 - 2 * (QLOOKAHEAD - k)];
190 tempin_ch2[QLOOKAHEAD + k] = pin[2 * k];
194 prefiltdata->INLABUF2_fix[k] = pin[FRAMESAMPLES - 2 * (QLOOKAHEAD - k)];
238 void WebRtcIsacfix_SplitAndFilter2(int16_t *pin,
254 WebRtcIsacfix_HighpassFilterFixDec32(pin, FRAMESAMPLES, WebRtcIsacfix_kHpStCoeffInQ30, prefiltdata->HPstates_fix);
259 tempin_ch1[k] = pin[1 + 2 * k];
265 tempin_ch2[k] = pin[2 * k]
[all...] |
| /device/google/contexthub/firmware/os/drivers/ams_tmd4903/ |
| ams_tmd4903.c | 226 struct Gpio *pin; member in struct:SensorData
324 if (!extiIsPendingGpio(data->pin)) {
328 pinState = gpioGet(data->pin);
351 extiClearPendingGpio(data->pin);
355 static bool enableInterrupt(struct Gpio *pin, struct ChainedIsr *isr, enum ExtiTrigger trigger)
357 extiEnableIntGpio(pin, trigger);
362 static bool disableInterrupt(struct Gpio *pin, struct ChainedIsr *isr)
365 extiDisableIntGpio(pin);
537 extiClearPendingGpio(mTask.pin);
538 enableInterrupt(mTask.pin, &mTask.isr, EXTI_TRIGGER_FALLING)
[all...] |
| /device/google/contexthub/firmware/os/drivers/rohm_rpr0521/ |
| rohm_rpr0521.c | 225 struct Gpio *pin; member in struct:SensorData
264 if (!extiIsPendingGpio(data->pin)) {
269 pinState = gpioGet(data->pin);
281 extiClearPendingGpio(data->pin);
285 static bool enableInterrupt(struct Gpio *pin, struct ChainedIsr *isr)
287 extiEnableIntGpio(pin, EXTI_TRIGGER_BOTH);
292 static bool disableInterrupt(struct Gpio *pin, struct ChainedIsr *isr)
295 extiDisableIntGpio(pin);
448 extiClearPendingGpio(mTask.pin);
449 enableInterrupt(mTask.pin, &mTask.isr)
[all...] |
| /external/openssh/ |
| ssh-pkcs11.c | 240 char *pin = NULL, prompt[1024]; local
258 error("need pin entry%s", (si->token.flags &
264 verbose("Deferring PIN entry to reader keypad.");
267 "Enter PIN for '%s': ", si->token.label);
268 pin = read_passphrase(prompt, RP_ALLOW_EOF);
269 if (pin == NULL)
272 rv = f->C_Login(si->session, CKU_USER, (u_char *)pin,
273 (pin != NULL) ? strlen(pin) : 0);
274 if (pin != NULL)
[all...] |
| /external/okhttp/okhttp-tests/src/test/java/com/squareup/okhttp/ |
| CertificatePinnerTest.java | 49 certA1Pin = CertificatePinner.pin(certA1.certificate);
55 certB1Pin = CertificatePinner.pin(certB1.certificate);
61 certC1Pin = CertificatePinner.pin(certC1.certificate);
67 static ByteString pinToBase64(String pin) {
68 return ByteString.decodeBase64(pin.substring("sha1/".length()));
89 /** Multiple certificates generated from the same keypair have the same pin. */
95 String keypairACertificate2Pin = CertificatePinner.pin(heldCertificateA2.certificate);
101 String keypairBCertificate2Pin = CertificatePinner.pin(heldCertificateB2.certificate);
|
| /external/u-boot/board/samsung/trats2/ |
| trats2.c | 38 * Don't set as pull-none for these N/C pin.
43 int pin = i + EXYNOS4X12_GPIO_M10; local
46 gpio_request(pin, str);
47 gpio_cfg_pin(pin, S5P_GPIO_INPUT);
52 int pin = i + EXYNOS4X12_GPIO_M12; local
55 gpio_request(pin, str);
56 gpio_cfg_pin(pin, S5P_GPIO_INPUT);
57 gpio_set_pull(pin, S5P_GPIO_PULL_NONE);
83 * if that pin set as input then that floated
|
| /external/u-boot/arch/x86/cpu/ |
| irq.c | 137 int bus, int device, int pin, int pirq)
141 slot->irq[pin - 1].link = pirq_linkno_to_reg(priv, pirq);
142 slot->irq[pin - 1].bitmap = priv->irq_mask;
271 pr.pin = fdt_addr_to_cpu(cell[1]);
276 PCI_FUNC(pr.bdf), 'A' + pr.pin - 1,
285 if (slot->irq[pr.pin - 1].link) {
289 * Sanity test on the routed PIRQ pin
295 if (slot->irq[pr.pin - 1].link !=
303 debug("writing INT%c\n", 'A' + pr.pin - 1);
305 pr.pin, pr.pirq)
[all...] |
