| /external/v8/src/ppc/ |
| assembler-ppc.cc | 841 void Assembler::addc(Register dst, Register src1, Register src2, OEBit o,
843 xo_form(EXT2 | ADDCX, dst, src1, src2, o, r);
846 void Assembler::adde(Register dst, Register src1, Register src2, OEBit o,
848 xo_form(EXT2 | ADDEX, dst, src1, src2, o, r);
857 void Assembler::sub(Register dst, Register src1, Register src2, OEBit o,
859 xo_form(EXT2 | SUBFX, dst, src2, src1, o, r);
862 void Assembler::subc(Register dst, Register src1, Register src2, OEBit o,
864 xo_form(EXT2 | SUBFCX, dst, src2, src1, o, r);
867 void Assembler::sube(Register dst, Register src1, Register src2, OEBit o,
869 xo_form(EXT2 | SUBFEX, dst, src2, src1, o, r)
[all...] |
| assembler-ppc.h | 676 inline void name(const Register src1, const Register src2, \
678 x_form(instr_name, cr, src1, src2, rc); \
680 inline void name##w(const Register src1, const Register src2, \
682 x_form(instr_name, cr.code() * B2, src1.code(), src2.code(), LeaveRC); \
[all...] |
| /external/libaom/libaom/av1/common/x86/ |
| highbd_warp_plane_sse4.c | 108 const __m128i *src, const __m128i *src2, __m128i *tmp, __m128i *coeff,
111 const __m128i src2_1 = *src2;
149 static INLINE void highbd_horiz_filter(const __m128i *src, const __m128i *src2,
155 highbd_filter_src_pixels(src, src2, tmp, coeff, offset_bits_horiz,
180 const __m128i src2 = local
182 highbd_filter_src_pixels(&src, &src2, tmp, coeff, offset_bits_horiz,
204 const __m128i src2 = local
209 highbd_filter_src_pixels(&src, &src2, tmp, coeff, offset_bits_horiz,
233 const __m128i src2 = local
235 highbd_filter_src_pixels(&src, &src2, tmp, coeff, offset_bits_horiz
256 const __m128i src2 = local
406 const __m128i src2 = local
[all...] |
| av1_convolve_scale_sse4.c | 51 const uint8_t *const src2 = src0 + 2 * src_stride; local
58 const __m128i data28 = _mm_loadl_epi64((__m128i *)src2);
149 const int16_t *const src2 = src0 + 2 * src_stride; local
157 const __m128i conv2 = convolve_16_8(src2, coeff0716);
289 const uint16_t *const src2 = src0 + 2 * src_stride; local
296 const __m128i data2lo = _mm_loadu_si128((__m128i *)src2);
381 const int16_t *const src2 = src0 + 2 * src_stride; local
389 const __m128i conv2 = convolve_16_8(src2, coeff0716);
|
| /external/libxaac/decoder/ |
| ixheaacd_basic_ops.c | 56 VOID ixheaacd_combine_fac(WORD32 *src1, WORD32 *src2, WORD32 *dest, WORD32 len,
61 *dest = ixheaacd_add32_sat(*src1, ((*src2) >> (fac_q - output_q)));
64 src2++;
68 *dest = ixheaacd_add32_sat(*src1, ((*src2) << (output_q - fac_q)));
71 src2++;
76 WORD8 ixheaacd_windowing_long1(WORD32 *src1, WORD32 *src2,
81 WORD32 *rsrc2 = src2 + vlen - 1;
87 ixheaacd_mult32_sh1(*src2, *win_rev));
93 src2++;
104 ((ixheaacd_mult32_sh1(*src2, *win_rev)) >> (shift2 - shift1)))
[all...] |
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| tgsi_ureg.h | 722 struct ureg_src src2 ) \
737 ureg_emit_src( ureg, src2 ); \
746 struct ureg_src src2 ) \
763 ureg_emit_src( ureg, src2 ); \
773 struct ureg_src src2, \
790 ureg_emit_src( ureg, src2 ); \
800 struct ureg_src src2, \
[all...] |
| /external/pcre/dist2/src/sljit/ |
| sljitLir.c | [all...] |
| /external/mesa3d/prebuilt-intermediates/nir/ |
| nir_builder_opcodes.h | 99 nir_bcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
101 return nir_build_alu(build, nir_op_bcsel, src0, src1, src2, NULL);
104 nir_bfi(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
106 return nir_build_alu(build, nir_op_bfi, src0, src1, src2, NULL);
119 nir_bitfield_insert(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
121 return nir_build_alu(build, nir_op_bitfield_insert, src0, src1, src2, src3);
274 nir_fcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
276 return nir_build_alu(build, nir_op_fcsel, src0, src1, src2, NULL);
369 nir_ffma(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
371 return nir_build_alu(build, nir_op_ffma, src0, src1, src2, NULL)
[all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.h | 298 void Push(Register src1, Register src2) {
301 sw(src2, MemOperand(sp, 0 * kPointerSize));
305 void Push(Register src1, Register src2, Register src3) {
308 sw(src2, MemOperand(sp, 1 * kPointerSize));
313 void Push(Register src1, Register src2, Register src3, Register src4) {
316 sw(src2, MemOperand(sp, 2 * kPointerSize));
322 void Push(Register src1, Register src2, Register src3, Register src4,
326 sw(src2, MemOperand(sp, 3 * kPointerSize));
378 void Pop(Register src1, Register src2) {
379 DCHECK(src1 != src2);
[all...] |
| /external/v8/src/mips64/ |
| macro-assembler-mips64.h | 317 void Push(Register src1, Register src2) {
320 Sd(src2, MemOperand(sp, 0 * kPointerSize));
324 void Push(Register src1, Register src2, Register src3) {
327 Sd(src2, MemOperand(sp, 1 * kPointerSize));
332 void Push(Register src1, Register src2, Register src3, Register src4) {
335 Sd(src2, MemOperand(sp, 2 * kPointerSize));
341 void Push(Register src1, Register src2, Register src3, Register src4,
345 Sd(src2, MemOperand(sp, 3 * kPointerSize));
396 void Pop(Register src1, Register src2) {
397 DCHECK(src1 != src2);
[all...] |
| /external/mesa3d/src/intel/compiler/ |
| test_fs_cmod_propagation.cpp | 204 fs_reg src2 = v->vgrf(glsl_type::float_type); local
207 bld.CMP(bld.null_reg_f(), src2, zero, BRW_CONDITIONAL_GE);
213 * 1: cmp.ge.f0(8) null src2 0.0f
243 fs_reg src2 = v->vgrf(glsl_type::float_type); local
246 set_predicate(BRW_PREDICATE_NORMAL, bld.SEL(dest1, src2, zero));
252 * 1: (+f0) sel(8) dest1 src2 0.0f
281 fs_reg src2 = v->vgrf(glsl_type::vec2_type); local
284 bld.emit(SHADER_OPCODE_TEX, dest, src2)
291 * 1: tex(8) rlen 4 dest+0 src2
322 fs_reg src2 = v->vgrf(glsl_type::float_type) local
[all...] |
| brw_fs_builder.h | 324 const src_reg &src1, const src_reg &src2) const
334 fix_3src_operand(src2)));
338 src0, src1, src2));
445 const src_reg &src2) const \
447 return emit(BRW_OPCODE_##op, dst, src0, src1, src2); \
|
| brw_vec4_builder.h | 290 const src_reg &src1, const src_reg &src2) const
300 fix_3src_operand(src2)));
303 return emit(instruction(opcode, dst, src0, src1, src2));
391 const src_reg &src2) const \
393 return emit(BRW_OPCODE_##op, dst, src0, src1, src2); \
|
| /external/skia/samplecode/ |
| SamplePolyToPoly.cpp | 133 const int src2[] = { 32, 32, 64, 32 }; local
135 doDraw(canvas, &paint, font, src2, dst2, 2);
|
| /external/skqp/samplecode/ |
| SamplePolyToPoly.cpp | 133 const int src2[] = { 32, 32, 64, 32 }; local
135 doDraw(canvas, &paint, font, src2, dst2, 2);
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIShrinkInstructions.cpp | 84 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
91 if (Src2) {
96 if (!isVGPR(Src2, TRI, MRI) ||
348 const MachineOperand *Src2 =
349 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
350 if (!Src2->isReg())
352 unsigned SReg = Src2->getReg();
386 const MachineOperand *Src2 =
387 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 412 void MacroAssembler::Mls(Register dst, Register src1, Register src2,
416 mls(dst, src1, src2, srcA, cond);
421 mul(scratch, src1, src2, LeaveCC, cond);
427 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
429 if (!src2.IsRegister() && !src2.MustOutputRelocInfo(this) &&
430 src2.immediate() == 0) {
432 } else if (!(src2.InstructionsRequired(this) == 1) &&
433 !src2.MustOutputRelocInfo(this) &&
435 base::bits::IsPowerOfTwo(src2.immediate() + 1))
[all...] |
| simulator-arm.cc | 3993 T src1[kLanes], src2[kLanes]; local
4005 T src1[kLanes], src2[kLanes]; local
4018 T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems]; local
4035 T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems]; local
4052 T src1[kElems], src2[kElems]; local
4065 T src1[kElems], src2[kElems]; local
4077 T src1[kElems], src2[kElems]; local
4089 T src1[kElems], src2[kElems]; local
4101 T src1[kElems], src2[kElems]; local
4174 T src1[kElems], src2[kElems]; local
4186 T src1[kElems], src2[kElems]; local
4206 T src1[kElems], src2[kElems]; local
4219 T dst[kElems], src1[kElems], src2[kElems]; local
4233 T dst[kElems], src1[kElems], src2[kElems]; local
4288 uint32_t src2[4]; local
4298 uint32_t src1[4], src2[4]; local
4475 float src1[4], src2[4]; local
4496 float src1[4], src2[4]; local
4511 float src1[4], src2[4]; local
4573 uint8_t src1[16], src2[16], dst[16]; local
4669 uint32_t dst[4], src1[4], src2[4]; local
4680 uint64_t src1, src2; local
4688 uint32_t src1[4], src2[4]; local
4824 float src1[4], src2[4]; local
4844 float src1[4], src2[4]; local
[all...] |
| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| mfqe_msa.c | 72 v16i8 src0, src1, src2, src3; local
82 LD_SB4(src_ptr, src_stride, src0, src1, src2, src3);
106 UNPCK_UB_SH(src2, src_r, src_l);
|
| /external/libvpx/libvpx/vp9/common/mips/msa/ |
| vp9_mfqe_msa.c | 72 v16i8 src0, src1, src2, src3, dst0, dst1, dst2, dst3; local
79 LD_SB4(src_ptr, src_stride, src0, src1, src2, src3);
103 UNPCK_UB_SH(src2, src_r, src_l);
|
| /external/dng_sdk/source/ |
| dng_pixel_buffer.cpp | 1635 const T *src2,
1649 const T *src2Save = src2;
1656 real64 diff = fabs ((real64)src1 [col] - src2 [col]);
1664 src2 += s2RowStep;
1669 src2 = src2Save + s2PlaneStep;
1682 const T *src2,
1696 src2,
1709 const T *src2Save = src2;
1716 real64 diff = fabs ((real64)src1 [col * s1ColStep] - src2 [col * s2ColStep]);
1724 src2 += s2RowStep
[all...] |
| /external/libmpeg2/common/arm/ |
| impeg2_inter_pred.s | 649 @// r1 - pointer to src2
675 ldr r5, [r1, #0] @ptr_y src2
693 vld1.8 {d8, d9}, [r5]! @row1 src2
695 vld1.8 {d10, d11}, [r5]! @row2 src2
697 vld1.8 {d12, d13}, [r5]! @row3 src2
699 vld1.8 {d14, d15}, [r5]! @row4 src2
731 ldr r5, [r1, #4] @ptr_u src2
752 vld1.8 {d8, d9}, [r5]! @row1 & 2 src2
754 vld1.8 {d10, d11}, [r5]! @row3 & 4 src2
756 vld1.8 {d12, d13}, [r5]! @row5 & 6 src2
[all...] |
| /external/swiftshader/src/Pipeline/ |
| ShaderCore.cpp | 784 void ShaderCore::mad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2)
786 dst.x = src0.x * src1.x + src2.x;
787 dst.y = src0.y * src1.y + src2.y;
788 dst.z = src0.z * src1.z + src2.z;
789 dst.w = src0.w * src1.w + src2.w;
792 void ShaderCore::imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2)
794 dst.x = As<Float4>(As<Int4>(src0.x) * As<Int4>(src1.x) + As<Int4>(src2.x));
795 dst.y = As<Float4>(As<Int4>(src0.y) * As<Int4>(src1.y) + As<Int4>(src2.y));
796 dst.z = As<Float4>(As<Int4>(src0.z) * As<Int4>(src1.z) + As<Int4>(src2.z));
797 dst.w = As<Float4>(As<Int4>(src0.w) * As<Int4>(src1.w) + As<Int4>(src2.w))
[all...] |
| /external/swiftshader/src/Shader/ |
| ShaderCore.cpp | 784 void ShaderCore::mad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2)
786 dst.x = src0.x * src1.x + src2.x;
787 dst.y = src0.y * src1.y + src2.y;
788 dst.z = src0.z * src1.z + src2.z;
789 dst.w = src0.w * src1.w + src2.w;
792 void ShaderCore::imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2)
794 dst.x = As<Float4>(As<Int4>(src0.x) * As<Int4>(src1.x) + As<Int4>(src2.x));
795 dst.y = As<Float4>(As<Int4>(src0.y) * As<Int4>(src1.y) + As<Int4>(src2.y));
796 dst.z = As<Float4>(As<Int4>(src0.z) * As<Int4>(src1.z) + As<Int4>(src2.z));
797 dst.w = As<Float4>(As<Int4>(src0.w) * As<Int4>(src1.w) + As<Int4>(src2.w))
[all...] |
| /external/libvpx/libvpx/vpx_dsp/ppc/ |
| inv_txfm_vsx.c | 1089 int16x8_t src0[4][8], src1[4][8], src2[4][8], src3[4][8], tmp[4][8]; local
[all...] |
