| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_from_tgsi.cpp | [all...] |
| /external/mesa3d/src/intel/compiler/ |
| brw_ir_vec4.h | 276 const src_reg &src2 = src_reg());
|
| brw_eu.h | 159 struct brw_reg src2);
|
| brw_ir_fs.h | 334 const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
|
| brw_vec4.h | 181 const src_reg &src2);
|
| /external/skia/tests/ |
| Matrix44Test.cpp | 195 SkMScalar src2[] = { 1, 2 }; local
196 SkMScalar src4[] = { src2[0], src2[1], 0, 1 };
204 mat.map2(src2, 1, dstA);
|
| /external/skqp/tests/ |
| Matrix44Test.cpp | 195 SkMScalar src2[] = { 1, 2 }; local
196 SkMScalar src4[] = { src2[0], src2[1], 0, 1 };
204 mat.map2(src2, 1, dstA);
|
| /external/v8/src/compiler/mips/ |
| code-generator-mips.cc | 215 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \
216 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \
1308 FPURegister src2 = i.InputSingleRegister(1); local
1317 DoubleRegister src2 = i.InputDoubleRegister(1); local
1326 FPURegister src2 = i.InputSingleRegister(1); local
1335 DoubleRegister src2 = i.InputDoubleRegister(1); local
[all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | 218 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \
219 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \
1412 FPURegister src2 = i.InputSingleRegister(1); local
1421 FPURegister src2 = i.InputDoubleRegister(1); local
1430 FPURegister src2 = i.InputSingleRegister(1); local
1439 FPURegister src2 = i.InputDoubleRegister(1); local
[all...] |
| /external/mesa3d/src/compiler/glsl/ |
| ir_expression_operation.py | 397 src2 = "op[2]->value.{0}[{1}]".format(types[2].union_field, indices[2]) if len(types) >= 3 else "ERROR"
404 src2=src2,
[all...] |
| /external/mesa3d/src/compiler/nir/ |
| nir_builder.h | 294 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
306 if (src2)
307 instr->src[2].src = nir_src_for_ssa(src2);
|
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.cc | [all...] |
| /external/webp/src/dsp/ |
| enc_sse2.c | 301 const __m128i src2 = _mm_loadl_epi64((const __m128i*)&src[2 * BPS]); local
309 const __m128i src_1 = _mm_unpacklo_epi16(src2, src3);
346 const __m128i src2 = _mm_loadl_epi64((const __m128i*)&src[2 * BPS]); local
350 const __m128i src_2 = _mm_unpacklo_epi8(src2, zero);
392 const __m128i src2 = _mm_loadl_epi64((__m128i*)&in[2 * 16]); local
395 const __m128i A23 = _mm_unpacklo_epi16(src2, src3); // A2 A3 | ...
[all...] |
| /external/icu/icu4c/source/test/cintltst/ |
| idnatest.c | 658 UChar* src2 = NULL; local
666 src2 = dest1;
668 dest2Len = uidna_toUnicode(src2, src2Len, dest2, dest2Len, UIDNA_DEFAULT, &ps, &status);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600Packetizer.cpp | 136 AMDGPU::OpName::src2
|
| R600InstrInfo.cpp | 255 AMDGPU::OpName::src2
266 {AMDGPU::OpName::src2, AMDGPU::OpName::src2_sel},
319 {AMDGPU::OpName::src2, AMDGPU::OpName::src2_sel},
[all...] |
| /external/mesa3d/src/mesa/main/ |
| ffvertex_prog.c | 573 struct ureg src2,
611 emit_arg( &inst->SrcReg[2], src2 );
619 #define emit_op3(p, op, dst, mask, src0, src1, src2) \
620 emit_op3fn(p, op, dst, mask, src0, src1, src2, __func__, __LINE__)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| R600Packetizer.cpp | 134 R600::OpName::src2
|
| /external/v8/src/s390/ |
| simulator-s390.cc | [all...] |
| /external/epid-sdk/ext/ipp/sources/ippcp/ |
| owncp.h | [all...] |
| /external/mesa3d/src/mesa/program/ |
| ir_to_mesa.cpp | 283 src_reg src0, src_reg src1, src_reg src2);
355 src_reg src0, src_reg src1, src_reg src2)
367 num_reladdr += src2.reladdr != NULL;
369 reladdr_to_temp(ir, &src2, &num_reladdr);
383 inst->src[2] = src2;
[all...] |
| /external/google-breakpad/src/testing/gtest/test/ |
| gtest_unittest.cc | [all...] |
| /external/lzma/C/ |
| XzDec.c | 657 const Byte *src2;
local
664 src2 = src;
671 src2 = p->buf + (CODER_BUF_SIZE * k) + p->pos[k];
700 src2, &srcLen2, srcFinished2,
[all...] |
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/core/ |
| binner.cpp | 284 void TransposeVertices(simd4scalar(&dst)[8], const simdscalar &src0, const simdscalar &src1, const simdscalar &src2)
286 vTranspose3x8(dst, src0, src1, src2);
290 void TransposeVertices(simd4scalar(&dst)[16], const simd16scalar &src0, const simd16scalar &src1, const simd16scalar &src2)
292 vTranspose4x16(reinterpret_cast<simd16scalar(&)[4]>(dst), src0, src1, src2, _simd16_setzero_ps()); variable
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64.h | 744 const CPURegister& src2 = NoReg, const CPURegister& src3 = NoReg);
746 const CPURegister& src2, const CPURegister& src3,
[all...] |
