| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| AMDGPUAsmParser.cpp | [all...] |
| /external/mesa3d/src/compiler/glsl/ |
| glsl_to_nir.cpp | 82 nir_ssa_def *src2);
84 nir_ssa_def *src2, nir_ssa_def *src3);
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.h | 507 void andn(Register dst, Register src1, Register src2); // no addr variant (for now)
|
| assembler_x86.cc | [all...] |
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 546 void andn(CpuRegister dst, CpuRegister src1, CpuRegister src2);
[all...] |
| assembler_x86_64.cc | [all...] |
| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_tgsi_vgpu10.c | [all...] |
| /external/swiftshader/src/Shader/ |
| PixelProgram.cpp | 117 const Src &src2 = instruction->src[2]; local
151 if(src2.type != Shader::PARAMETER_VOID) s2 = fetchRegister(src2);
[all...] |
| /external/mesa3d/src/amd/common/ |
| ac_nir_to_llvm.c | [all...] |
| /external/pcre/dist2/src/ |
| pcre2_jit_compile.c | 594 #define OP2(op, dst, dstw, src1, src1w, src2, src2w) \
595 sljit_emit_op2(compiler, (op), (dst), (dstw), (src1), (src1w), (src2), (src2w))
606 #define CMP(type, src1, src1w, src2, src2w) \
607 sljit_emit_cmp(compiler, (type), (src1), (src1w), (src2), (src2w))
608 #define CMPTO(type, src1, src1w, src2, src2w, label) \
609 sljit_set_label(sljit_emit_cmp(compiler, (type), (src1), (src1w), (src2), (src2w)), (label))
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-aarch32.cc | 5448 const uint32_t src2[4] = {0x11111111, 0x22222222, 0x33333333, 0x44444444}; local
[all...] |
| /external/libaom/libaom/aom_dsp/x86/ |
| highbd_subpel_variance_impl_sse2.asm | 43 %macro SUM_SSE 6 ; src1, dst1, src2, dst2, sum, sse
|
| subpel_variance_sse2.asm | 52 %macro SUM_SSE 6 ; src1, dst1, src2, dst2, sum, sse
[all...] |
| /external/libaom/libaom/third_party/libyuv/source/ |
| x86inc.asm | 897 ; 3arg AVX ops with a memory arg can only have it in src2,
|
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| row_common.cc | [all...] |
| /external/libvpx/libvpx/vpx_dsp/x86/ |
| highbd_subpel_variance_impl_sse2.asm | 40 %macro SUM_SSE 6 ; src1, ref1, src2, ref2, sum, sse
|
| subpel_variance_sse2.asm | 49 %macro SUM_SSE 6 ; src1, ref1, src2, ref2, sum, sse
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | [all...] |
| /external/tensorflow/tensorflow/compiler/xla/service/ |
| hlo_evaluator_test.cc | 115 Literal src1, Literal src2) {
122 b.AddInstruction(HloInstruction::CreateConstant(std::move(src2)));
[all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.h | 818 const CPURegister& src2 = NoReg,
[all...] |
| /external/mesa3d/src/intel/compiler/ |
| brw_fs.cpp | 120 const fs_reg &src0, const fs_reg &src1, const fs_reg &src2)
122 const fs_reg src[3] = { src0, src1, src2 };
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.cc | [all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.cc | [all...] |
| /art/runtime/ |
| debugger.cc | 1275 const uint16_t* src2 = reinterpret_cast<uint16_t*>(a->GetRawData(sizeof(uint16_t), 0)); local
[all...] |
