| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 761 case AArch64::ADRP:
[all...] |
| AArch64FastISel.cpp | 445 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
476 // ADRP + LDRX
477 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
488 // ADRP + ADDX
489 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
[all...] |
| AArch64ISelLowering.cpp | [all...] |
| /external/v8/src/arm64/ |
| constants-arm64.h | 440 // case ADRP: Format("adrp 'Xd, 'AddrPCRelPage"); break;
504 ADRP = PCRelAddressingFixed | 0x80000000
[all...] |
| simulator-arm64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | [all...] |
| /external/vixl/src/aarch64/ |
| constants-aarch64.h | 404 // case ADRP: Format("adrp 'Xd, 'AddrPCRelPage"); break;
469 ADRP = PCRelAddressingFixed | 0x80000000
[all...] |
| disasm-aarch64.cc | 592 case ADRP:
593 Format(instr, "adrp", "'Xd, 'AddrPCRelPage");
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| simulator-aarch64.cc | [all...] |
| assembler-aarch64.cc | 79 // them. This matches the semantics of adrp, for example.
457 void Assembler::adrp(const Register& xd, int64_t imm21) { function in class:vixl::aarch64::Assembler
459 Emit(ADRP | ImmPCRelAddress(imm21) | Rd(xd));
463 void Assembler::adrp(const Register& xd, Label* label) { function in class:vixl::aarch64::Assembler
465 adrp(xd, static_cast<int>(LinkAndGetPageOffsetTo(label)));
[all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| AArch64GenDAGISel.inc | [all...] |
| AArch64GenMCCodeEmitter.inc | 218 UINT64_C(2415919104), // ADRP
[all...] |
| AArch64GenAsmMatcher.inc | [all...] |
| AArch64GenInstrInfo.inc | 220 ADRP = 205,
[all...] |
