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Searched
refs:BIT19
(Results
26 - 50
of
53
) sorted by null
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/device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Lan9118Dxe/
Lan9118DxeHw.h
188
#define INSTS_GPT_INT
BIT19
// GP Timer wrapped past 0xFFFF
284
#define MACCR_MCPAS
BIT19
// Pass all Multicast packets bit
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
QuarkNcSocId.h
149
#define B_WDT_CONTROL_DBL_ECC_BIT_ERR_MASK (
BIT19
| BIT18)
232
#define SMI_EN (
BIT19
) // SMI Global Enable (from Legacy Bridge)
321
#define SOCCLKEN_CONFIG_PHY_I_CMNRESET_L
BIT19
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QNCCommonDefinitions.h
89
#define
BIT19
0x00080000
/bionic/libc/kernel/uapi/linux/
synclink.h
42
#define
BIT19
0x00080000
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/
Ioh.h
48
#define
BIT19
0x00080000
IohCommonDefinitions.h
89
#define
BIT19
0x00080000
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibPei/
I2CLibPei.h
41
#define B_PCH_LPSS_I2C_STSCMD_INTRSTS
BIT19
// Interrupt Status
/external/kernel-headers/original/uapi/linux/
synclink.h
38
#define
BIT19
0x00080000
/device/linaro/bootloader/OpenPlatformPkg/Drivers/Usb/DwUsbDxe/
DwUsbDxe.h
211
#define GINTSTS_OEPINT
BIT19
571
#define DXEPCTL_EPTYPE_MASK (
BIT19
| BIT18)
DwUsbDxe.c
387
WRITE_REG32 (DIEPCTL1, (READ_REG32 (DIEPCTL1)) | BIT28 |
BIT19
| DXEPCTL_USBACTEP | BIT11);
/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
Acpi30.h
259
#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE
BIT19
Acpi40.h
217
#define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE
BIT19
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Tpm12.h
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Acpi50.h
343
#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE
BIT19
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Acpi51.h
233
#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE
BIT19
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/device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/
GccInline.c
1755
if ((RegEdx &
BIT19
) == 0) {
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
meminit_utils.c
237
msk = (byte_lane & BIT0) ? (
BIT19
| BIT18 | BIT17 | BIT16) : (BIT7 | BIT6 | BIT5 | BIT4);
250
msk = (BIT21 | BIT20 |
BIT19
| BIT18 | BIT17 | BIT16);
472
msk = (BIT29 | BIT28 | BIT27 | BIT26 | BIT25 | BIT24) | (BIT21 | BIT20 |
BIT19
| BIT18 | BIT17 | BIT16)
582
msk = (BIT21 | BIT20 |
BIT19
| BIT18 | BIT17 | BIT16) | (BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8);
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...]
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/
VlvCommonDefinitions.h
96
#define
BIT19
0x00080000
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
PchRegsPcu.h
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/device/linaro/bootloader/edk2/MdePkg/Include/
Base.h
384
#define
BIT19
0x00080000
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/
XhcPeim.c
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/device/linaro/bootloader/edk2/MdePkg/Include/Guid/
Cper.h
803
#define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID
BIT19
879
#define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID
BIT19
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
Xhci.c
517
State &= ~ (BIT1 | BIT17 | BIT18 |
BIT19
| BIT20 | BIT21 | BIT22 | BIT23);
634
State &= ~ (BIT1 | BIT17 | BIT18 |
BIT19
| BIT20 | BIT21 | BIT22 | BIT23);
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...]
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/SasV1Dxe/
SasV1Dxe.c
185
#define CMPLT_HDR_RSPNS_XFRD_MSK
BIT19
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/
PcieInitLib.c
210
//BIT29 | BIT27 | BIT25 | BIT23 | BIT21 |
BIT19
| BIT17: Enable RO for all types of write transaction
211
Value |= (BIT29 | BIT27 | BIT25 | BIT23 | BIT21 |
BIT19
| BIT17);
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Completed in 1786 milliseconds
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