| /device/linaro/bootloader/edk2/ArmPkg/Include/Chipset/ |
| AArch64.h | 62 #define ARM_HCR_FMO BIT3
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/Common/ |
| BaseTypes.h | 224 #define BIT3 0x00000008
|
| /device/linaro/bootloader/edk2/CorebootModulePkg/SataControllerDxe/ |
| SataController.h | 41 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
|
| /device/linaro/bootloader/edk2/DuetPkg/SataControllerDxe/ |
| SataController.h | 41 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/SataControllerDxe/ |
| SataController.h | 44 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UhciPei/ |
| UhcPeim.h | 46 #define USBCMD_EGSM BIT3 /* Global Suspend Mode */
57 #define USBSTS_HSE BIT3 /* Host System Error - basically PCI problems */
66 #define USBINTR_SP BIT3 /* Short packet interrupt enable */
84 #define USBPORTSC_PEDC BIT3 /* Port Enable / Disable Change */
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Include/Protocol/ |
| DisplayProtocol.h | 150 #define HII_DISPLAY_MODAL BIT3
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/ |
| Omap3530Gpio.h | 53 #define GPIO_SYSCONFIG_IDLEMODE_NONE BIT3
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/LcdGraphicsOutputDxe/ |
| LcdGraphicsOutputDxe.h | 145 #define ACTIVEMATRIX BIT3
|
| /device/linaro/bootloader/edk2/OvmfPkg/SataControllerDxe/ |
| SataController.h | 41 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| MrcWrapper.h | 95 #define PDAT_MRC_FLAG_TOP_TREE_EN BIT3 ///< 0b DDR "fly-by" topology else 1b DDR "tree" topology.
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/NorFlashDxe/ |
| NorFlashDxe.h | 60 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/ |
| IsaFloppy.h | 204 #define INT_DMA_ENABLE BIT3
348 #define STS0_NR BIT3
392 // BIT3 is unused
|
| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| Acpi30.h | 233 #define EFI_ACPI_3_0_MSI_NOT_SUPPORTED BIT3
243 #define EFI_ACPI_3_0_P_LVL2_UP BIT3
|
| PeImage.h | 102 #define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED BIT3 ///< 0x0008 Local symbols stripped from file.
303 #define EFI_IMAGE_SCN_TYPE_NO_PAD BIT3 ///< 0x00000008 ///< Reserved.
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/ |
| MMCSDBlockIo.c | 150 if (!(CardData->ExtCSDRegister.CARD_TYPE & (BIT2 | BIT3))) {
373 if (!(CardData->ExtCSDRegister.CARD_TYPE & (BIT2 | BIT3))) {
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Sd/SdBlockIoPei/ |
| SdHci.c | 804 HostCtrl2 = BIT3;
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/SdMmc/XenonDxe/ |
| SdMmcPciHci.c | 974 HostCtrl2 = BIT3;
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/ |
| SdMmcPciHci.c | 974 HostCtrl2 = BIT3;
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| Platform.c | 797 DEBUG((EFI_D_INFO , "GGC: 0x%08x GMSsize:0x%08x\n", GGC, (GGC & (BIT7|BIT6|BIT5|BIT4|BIT3))>>3));
804 DEBUG((EFI_D_INFO , "GGC: 0x%08x GMSsize:0x%08x\n", GGC, (GGC & (BIT7|BIT6|BIT5|BIT4|BIT3))>>3));
1126 do { StsReg = (UINT8) IoRead8(SmbusBase+0); } while ((StsReg & (BIT4|BIT3|BIT2|BIT1)) == 0);
[all...] |
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/ |
| meminit_utils.c | 172 msk = (BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
348 msk = (byte_lane & BIT0) ? (BIT15 | BIT14 | BIT13 | BIT12) : (BIT3 | BIT2 | BIT1 | BIT0);
372 msk |= (byte_lane & BIT0) ? (BIT3) : (BIT0);
473 | (BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8) | (BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
602 msk |= (BIT3 | BIT2 | BIT1 | BIT0); // only ??? matters
787 (vref_codes[setting] << 2), (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2));
788 //isbM32m(DDRPHY, (reg + (channel * DDRIODQ_CH_OFFSET) + ((byte_lane >> 1) * DDRIODQ_BL_OFFSET)), (setting<<2), (BIT7|BIT6|BIT5|BIT4|BIT3|BIT2));
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/ |
| EmmcHci.c | 804 HostCtrl2 = BIT3;
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/ |
| SmiEntry.S | 114 orl $BIT3, %eax
253 orl $BIT3, %eax
|
| /bionic/libc/kernel/uapi/linux/ |
| synclink.h | 26 #define BIT3 0x0008
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/ |
| Ps2Keyboard.h | 197 #define KEYBOARD_STATUS_REGISTER_INPUT_DATA_TYPE BIT3 ///< 0 - Data in input register is data; 1 - Data in input register is command
|
