/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 202 case ISD::FREM: return "frem";
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LegalizeVectorOps.cpp | 275 case ISD::FREM: [all...] |
LegalizeFloatTypes.cpp | 99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break; [all...] |
LegalizeVectorTypes.cpp | 120 case ISD::FREM: 691 case ISD::FREM: [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 82 ISD::FREM, ISD::FMA})
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.h | [all...] |
SelectionDAGDumper.cpp | 240 case ISD::FREM: return "frem"; [all...] |
LegalizeFloatTypes.cpp | 99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break; [all...] |
LegalizeVectorOps.cpp | 334 case ISD::FREM: [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/dalvik/dx/src/com/android/dx/cf/code/ |
BytecodeArray.java | 624 case ByteOps.FREM: [all...] |
/external/apache-commons-bcel/src/main/java/org/apache/bcel/verifier/structurals/ |
ExecutionVisitor.java | 540 public void visitFREM(final FREM o) { [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 255 setOperationAction(ISD::FREM, MVT::f32, Custom); 256 setOperationAction(ISD::FREM, MVT::f64, Custom); 416 setOperationAction(ISD::FREM, VT, Expand); 712 case ISD::FREM: return LowerFREM(Op, DAG); [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 72 setOperationAction(ISD::FREM, MVT::f32, Expand); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 88 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | 103 case ISD::FREM: 492 case ISD::FREM: [all...] |
FastISel.cpp | 907 case Instruction::FRem: 908 return SelectBinaryOp(I, ISD::FREM); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 326 setOperationAction(ISD::FREM, MVT::f32, Custom); 327 setOperationAction(ISD::FREM, MVT::f64, Custom); 454 setOperationAction(ISD::FREM, VT, Expand); 590 case ISD::FREM: [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAGNodes.h | 946 case ISD::FREM: [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 132 setOperationAction(ISD::FREM, MVT::f32, Expand); 133 setOperationAction(ISD::FREM, MVT::f64, Expand); 134 setOperationAction(ISD::FREM, MVT::f80, Expand); 152 setOperationAction(ISD::FREM, MVT::f128, Expand); 270 setOperationAction(ISD::FREM, MVT::f16, Promote); 325 setOperationAction(ISD::FREM, MVT::v4f16, Expand); 357 setOperationAction(ISD::FREM, MVT::v8f16, Expand); 535 setOperationAction(ISD::FREM, MVT::v1f64, Expand); 692 setOperationAction(ISD::FREM, VT, Expand); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 197 setOperationAction(ISD::FREM, MVT::f32, Expand); 198 setOperationAction(ISD::FREM, MVT::f64, Expand); 199 setOperationAction(ISD::FREM, MVT::f80, Expand); 219 setOperationAction(ISD::FREM, MVT::f128, Expand); 335 setOperationAction(ISD::FREM, MVT::f16, Promote); 336 setOperationAction(ISD::FREM, MVT::v4f16, Promote); 337 setOperationAction(ISD::FREM, MVT::v8f16, Promote); 633 setOperationAction(ISD::FREM, MVT::v1f64, Expand); [all...] |
/external/guice/lib/build/ |
asm-6.0.jar | |