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Searched
refs:MmioRead32
(Results
51 - 75
of
169
) sorted by null
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/device/linaro/bootloader/edk2/MdePkg/Library/BaseIoLibIntrinsic/
IoLibIpf.c
122
return
MmioRead32
(InternalGetMemoryMapAddress (Port));
339
MmioRead32
(
IoLib.c
209
MmioRead32
(
/device/linaro/bootloader/edk2/MdePkg/Library/DxeIoLibCpuIo2/
IoHighLevel.c
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/device/linaro/bootloader/edk2/MdePkg/Library/DxeIoLibEsal/
IoHighLevel.c
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/device/linaro/bootloader/edk2/MdePkg/Library/PeiIoLibCpuIo/
IoHighLevel.c
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/device/linaro/bootloader/edk2/MdePkg/Library/SmmIoLibSmmCpuIo2/
IoHighLevel.c
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/VlvPlatformInitDxe/
VlvPlatformInit.c
67
GtStatus =
MmioRead32
((UINTN)Base+ Offset);
71
GtStatus =
MmioRead32
((UINTN)Base + Offset);
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/StyxRngDxe/
StyxRngDxe.c
151
Val =
MmioRead32
(mCcpRngOutputReg);
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Marvell/Library/ResetSystemLib/
MvResetSystemLib.c
93
Data =
MmioRead32
(mAddress);
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/
CTA15-A7.c
124
if (
MmioRead32
(ARM_CTA15A7_SCC_SYSINFO) & ARM_CTA15A7_SCC_SYSINFO_UEFI_RESTORE_DEFAULT_NORFLASH) {
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/
RTSM.c
167
ProcType =
MmioRead32
(ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/ArmTrustZone/
ArmTrustZone.c
76
return (
MmioRead32
((UINTN)TzascBase + TZASC_CONFIGURATION_REG) & 0xF);
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/
PL111Lcd.c
99
LcdControl =
MmioRead32
( PL111_REG_LCD_CONTROL);
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL301Axi/
PL301Axi.c
53
#define FAxiReadReg(reg)
MmioRead32
(FAxiBase + reg)
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL310L2Cache/
PL310L2Cache.c
22
#define L2x0ReadReg(reg)
MmioRead32
(PcdGet32(PcdL2x0ControllerBase) + reg)
/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePi/
MainMPCore.c
88
SecondaryEntryAddr =
MmioRead32
(ArmCoreInfoTable[Index].MailboxGetAddress);
/device/linaro/bootloader/edk2/BeagleBoardPkg/Library/ResetSystemLib/
ResetSystemLib.c
136
while ((
MmioRead32
(PRM_RSTST) & GLOBAL_COLD_RST) != 0x1);
/device/linaro/bootloader/edk2/Omap35xxPkg/Library/DebugAgentTimerLib/
DebugAgentTimerLib.c
159
while ((
MmioRead32
(gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);
/device/linaro/bootloader/edk2/Omap35xxPkg/PciEmulation/
PciEmulation.c
101
PhysicalPorts =
MmioRead32
(USB_EHCI_HCCAPBASE + 0x4) & 0x0000000F;
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Library/IohLib/
IohLib.c
95
GipData =
MmioRead32
(TempBarAddr + GPIO_EXT_PORTA);
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/
IchTcoReset.c
123
*RcrbGcsSaveValue =
MmioRead32
(PMC_BASE_ADDRESS + R_PCH_PMC_PM_CFG);
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Marvell/Library/ComPhyLib/
ComPhyLib.c
64
DEBUG((DEBUG_INFO, "old value = %10x ==> ",
MmioRead32
(Addr)));
66
DEBUG((DEBUG_INFO, "new value %10x\n",
MmioRead32
(Addr)));
78
RegData =
MmioRead32
(Addr);
/device/linaro/bootloader/edk2/Omap35xxPkg/InterruptDxe/
HardwareInterrupt.c
88
if ((
MmioRead32
(INTCPS_ILR(Source)) & INTCPS_ILR_FIQ) == INTCPS_ILR_FIQ) {
212
if ((
MmioRead32
(INTCPS_MIR(Bank)) & Bit) == Bit) {
266
Vector =
MmioRead32
(INTCPS_SIR_IRQ) & INTCPS_SIR_IRQ_MASK;
/device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
DebugCommunicationLibUsb3Common.c
60
RegisterValue =
MmioRead32
(Register);
79
RegisterValue =
MmioRead32
(Register);
126
Data =
MmioRead32
((UINTN)(DebugCapabilityBase + Offset));
259
CapabilityPointer = Handle->XhciMmioBase + (
MmioRead32
((UINTN)(Handle->XhciMmioBase + XHC_HCCPARAMS_OFFSET)) >> 16) * 4;
265
Capability =
MmioRead32
((UINTN)CapabilityPointer);
278
Capability =
MmioRead32
((UINTN)CapabilityPointer);
649
TotalUsb3Port =
MmioRead32
(((UINTN) Handle->XhciMmioBase + XHC_HCSPARAMS1_OFFSET)) >> 24;
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/PciHostBridgeDxe/
PciRootBridgeIo.c
656
DEBUG ((EFI_D_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, __LINE__, RbPciBase + 0x900 + i,
MmioRead32
(RbPciBase + 0x900 + i)));
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