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Searched
refs:MmioRead32
(Results
76 - 100
of
169
) sorted by null
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Drivers/IoInitDxe/
Smmu.c
239
return
MmioRead32
(Base);
280
Value =
MmioRead32
(Base + SMMU_RINT_GFSR);
393
UINTN S1Ctb =
MmioRead32
(Smmu->S2Cbt + SMMU_CB_S1CTBAR(SMMU_OS_VMID));
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/
UfsHci.c
53
Value =
MmioRead32
(Address) & MaskValue;
722
Data =
MmioRead32
(Address);
751
Data =
MmioRead32
(Address);
754
Data =
MmioRead32
(Address);
[
all
...]
/device/linaro/bootloader/edk2/SecurityPkg/Library/Tpm12DeviceLibDTpm/
Tpm12Tis.c
81
InterfaceId.Uint32 =
MmioRead32
((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
82
InterfaceCapability.Uint32 =
MmioRead32
((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);
485
RegRead =
MmioRead32
((UINTN)Register);
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/
CTA9x4.c
117
if (
MmioRead32
(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
CTA9x4Mem.c
101
if (
MmioRead32
(ARM_VE_SYS_PROCID1_REG) != 0) {
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/
RTSMMem.c
59
SysId =
MmioRead32
(ARM_VE_SYS_ID_REG);
/device/linaro/bootloader/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/
PL031RealTimeClockLib.c
92
if ((
MmioRead32
(mPL031RtcBase + PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER) & PL031_SET_IRQ_MASK) != PL031_SET_IRQ_MASK) {
97
if ((
MmioRead32
(mPL031RtcBase + PL031_RTC_RIS_RAW_IRQ_STATUS_REGISTER) & PL031_IRQ_TRIGGERED) == PL031_IRQ_TRIGGERED) {
102
if ((
MmioRead32
(mPL031RtcBase + PL031_RTC_CR_CONTROL_REGISTER) & PL031_RTC_ENABLED) != PL031_RTC_ENABLED) {
276
EpochSeconds =
MmioRead32
(mPL031RtcBase + PL031_RTC_DR_DATA_REGISTER);
/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePeiCore/
MainMPCore.c
89
SecondaryEntryAddr =
MmioRead32
(ArmCoreInfoTable[Index].MailboxGetAddress);
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseIoLibIntrinsic/
IoLibGcc.c
135
MmioRead32
(
/device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Isp1761UsbDxe/
Isp1761UsbDxe.h
20
#define READ_REG32(Offset)
MmioRead32
(ISP1761_USB_BASE + Offset)
/device/linaro/bootloader/edk2/MdePkg/Library/BaseIoLibIntrinsic/
IoLibArm.c
343
MmioRead32
(
/device/linaro/bootloader/edk2/Omap35xxPkg/Gpio/
Gpio.c
46
if (
MmioRead32
(DataInRegister) & GPIO_DATAIN_MASK(Pin)) {
/device/linaro/bootloader/edk2/OvmfPkg/Library/VirtioMmioDeviceLib/
VirtioMmioDevice.c
74
MmioRead32
(BaseAddress + VIRTIO_MMIO_OFFSET_DEVICE_ID);
VirtioMmioDevice.h
43
(
MmioRead32
(Device->BaseAddress + (Offset)))
/device/linaro/bootloader/edk2/PcAtChipsetPkg/Library/BaseIoApicLib/
IoApicLib.c
46
return
MmioRead32
(PcdGet32 (PcdIoApicBaseAddress) + IOAPIC_DATA_OFFSET);
/device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/
ArmPciCpuIo2Dxe.c
258
*((UINT32 *)Uint8Buffer) =
MmioRead32
((UINTN)Address);
423
*((UINT32 *)Uint8Buffer) =
MmioRead32
((UINTN)Address);
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL34xDmc/
PL341Dmc.c
24
#define DmcReadReg(reg)
MmioRead32
(DmcBase + reg)
28
#define DmcPhyReadReg(reg)
MmioRead32
(DmcPhyBase + reg)
/device/linaro/bootloader/edk2/ArmVirtPkg/Library/QemuFwCfgLib/
QemuFwCfgLib.c
232
*(UINT32 *)Ptr =
MmioRead32
(mFwCfgDataAddress);
237
*(UINT32 *)Ptr =
MmioRead32
(mFwCfgDataAddress);
/device/linaro/bootloader/edk2/SecurityPkg/Tcg/Tcg2Config/
Tcg2ConfigImpl.c
80
InterfaceId.Uint32 =
MmioRead32
((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
81
InterfaceCapability.Uint32 =
MmioRead32
((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);
115
InterfaceId.Uint32 =
MmioRead32
((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
143
InterfaceId.Uint32 =
MmioRead32
((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
178
InterfaceId.Uint32 =
MmioRead32
((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
/device/linaro/bootloader/edk2/UefiCpuPkg/CpuIoPei/
CpuIoPei.c
242
*((UINT32 *)Uint8Buffer) =
MmioRead32
((UINTN)Address);
244
WriteUnaligned32 ((UINT32 *)Uint8Buffer,
MmioRead32
((UINTN)Address));
710
return
MmioRead32
((UINTN)Address);
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/NorFlashDxe/
NorFlashHw.c
43
return
MmioRead32
(FlashAddr);
455
dwTemp1 =
MmioRead32
(dwTestAddr);
458
dwTemp =
MmioRead32
(dwTestAddr);
459
dwTemp1 =
MmioRead32
(dwTestAddr);
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Library/I2CLib/
I2CHw.h
35
(result) =
MmioRead32
((reg))
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/
InitController.c
83
RegVal =
MmioRead32
(AhciBaseAddr + PortRegAddr);
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/HiKey/Library/HiKeyLib/
HiKeyMem.c
56
Data =
MmioRead32
(MDDRC_AXI_BASE + AXI_REGION_MAP);
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Marvell/Library/MppLib/
MppLib.c
181
Reg =
MmioRead32
(BaseAddr + Offset);
Completed in 2942 milliseconds
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