| /device/linaro/bootloader/edk2/MdePkg/Library/DxeIoLibEsal/ |
| IoHighLevel.c | [all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/PeiIoLibCpuIo/ |
| IoHighLevel.c | [all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/SmmIoLibSmmCpuIo2/ |
| IoHighLevel.c | [all...] |
| IoLib.c | 519 MmioWrite32 (
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ |
| CTA9x4Sec.c | 172 MmioWrite32 (ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/PrePeiCore/ |
| MainMPCore.c | 83 MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue);
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseIoLibIntrinsic/ |
| IoLibGcc.c | 158 MmioWrite32 (
|
| IoLibIcc.c | 150 MmioWrite32 (
|
| IoLibMsc.c | 376 MmioWrite32 (
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseIoLibIntrinsic/ |
| IoLibArm.c | 369 MmioWrite32 (
|
| /device/linaro/bootloader/edk2/OvmfPkg/Library/VirtioMmioDeviceLib/ |
| VirtioMmioDevice.h | 41 (MmioWrite32 (Device->BaseAddress + (Offset), Val))
|
| /device/linaro/bootloader/edk2/PcAtChipsetPkg/Library/BaseIoApicLib/ |
| IoApicLib.c | 68 return MmioWrite32 (PcdGet32 (PcdIoApicBaseAddress) + IOAPIC_DATA_OFFSET, Value);
|
| /device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ |
| ArmPciCpuIo2Dxe.c | 339 MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
509 MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL34xDmc/ |
| PL341Dmc.c | 23 #define DmcWriteReg(reg,val) MmioWrite32(DmcBase + reg, val)
27 #define DmcPhyWriteReg(reg,val) MmioWrite32(DmcPhyBase + reg, val)
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/ |
| UsbPei.c | 89 MmioWrite32 (UsbBaseAddr + EhciCapLen + R_IOH_EHCI_CONFIGFLAGS, 0);
307 MmioWrite32(PeiIohOhciDev->MmioBase[i] + R_IOH_USB_OHCI_HCCABAR, (UINT32)AllocateAddress);
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/CpuIoPei/ |
| CpuIoPei.c | 316 MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
318 MmioWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
798 MmioWrite32 ((UINTN)Address, Data);
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Library/I2CLib/ |
| I2CHw.h | 32 MmioWrite32 ((reg), (data))
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/BaseXApicX2ApicLib/ |
| BaseXApicX2ApicLib.c | 188 MmioWrite32 (GetLocalApicBaseAddress() + MmioOffset, Value);
260 MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET, ApicId << 24);
261 MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET, IcrLow);
273 MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET, IcrHigh);
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/ |
| BoardGpios.c | 290 MmioWrite32(mmio_padval, pad_val.dw);
380 MmioWrite32 (mmio_conf0, conf0_val.dw);
|
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Usb/DwUsbDxe/ |
| DwUsbDxe.h | 22 #define WRITE_REG32(Offset, Val) MmioWrite32 (DW_USB_BASE + Offset, Val)
23 #define WRITE_REG16(Offset, Val) MmioWrite32 (DW_USB_BASE + Offset, (UINT32) Val)
24 #define WRITE_REG8(Offset, Val) MmioWrite32 (DW_USB_BASE + Offset, (UINT32) Val)
|
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| DebugCommunicationLibUsb3Common.c | 62 MmioWrite32 (Register, RegisterValue);
81 MmioWrite32 (Register, RegisterValue);
102 MmioWrite32 ((UINTN)(DebugCapabilityBase + Offset), Data);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
| PL031RealTimeClockLib.c | 284 MmioWrite32 (mPL031RtcBase + PL031_RTC_LR_LOAD_REGISTER, EpochSeconds);
493 MmioWrite32 (mPL031RtcBase + PL031_RTC_LR_LOAD_REGISTER, EpochSeconds);
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/ |
| PcieInitLib.h | 73 #define RegWrite(addr,data) MmioWrite32((addr), (data))
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/Marvell/Library/ComPhyLib/ |
| ComPhyLib.c | 81 MmioWrite32 (Addr, RegData);
|
| /device/linaro/bootloader/edk2/ArmVirtPkg/Library/QemuFwCfgLib/ |
| QemuFwCfgLib.c | 287 MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)&Access));
|
