/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
ARMDisassembler.cpp | 106 static DecodeStatus DecodeGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, 109 unsigned RegNo, uint64_t Address, 111 static DecodeStatus DecodetGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, 113 static DecodeStatus DecodetcGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, 115 static DecodeStatus DecoderGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, 117 static DecodeStatus DecodeSPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, 119 static DecodeStatus DecodeDPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, 121 static DecodeStatus DecodeDPR_8RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 124 unsigned RegNo, 127 static DecodeStatus DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/AsmParser/ |
RISCVAsmParser.cpp | 61 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 500 static std::unique_ptr<RISCVOperand> createReg(unsigned RegNo, SMLoc S, 503 Op->Reg.RegNum = RegNo; 784 bool RISCVAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 789 RegNo = 0; 820 unsigned RegNo = MatchRegisterName(Name); 821 if (RegNo == 0) { 822 RegNo = MatchRegisterAltName(Name); 823 if (RegNo == 0) { 834 Operands.push_back(RISCVOperand::createReg(RegNo, S, E, isRV64())) [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 527 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); 532 return RegNo; 537 return 2 * RegNo; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 538 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); 543 return RegNo; 548 return 2 * RegNo; [all...] |
/external/capstone/arch/Mips/ |
MipsInstPrinter.c | 85 static char *getRegisterName(unsigned RegNo); 150 static void printRegName(SStream *OS, unsigned RegNo) 152 SStream_concat(OS, "$%s", getRegisterName(RegNo));
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/external/capstone/arch/Sparc/ |
SparcInstPrinter.c | 41 static char *getRegisterName(unsigned RegNo); 93 static void printRegName(SStream *OS, unsigned RegNo) 96 SStream_concat0(OS, getRegisterName(RegNo));
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/external/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 145 unsigned RegNo; // For MO_Register. 165 // Register number is in SmallContents.RegNo. 269 return SmallContents.RegNo; 625 Op.SmallContents.RegNo = Reg;
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
MachineOperand.h | 119 unsigned RegNo; // For MO_Register. 137 // Register number is in SmallContents.RegNo. 223 return SmallContents.RegNo; 503 Op.SmallContents.RegNo = Reg;
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/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 140 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 318 unsigned getReg(int RC, int RegNo); [all...] |
/art/compiler/utils/arm64/ |
managed_register_arm64.h | 199 int RegNo() const;
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/external/capstone/arch/XCore/ |
XCoreGenAsmWriter.inc | 733 static char *getRegisterName(unsigned RegNo) 735 // assert(RegNo && RegNo < 17 && "Invalid register number!"); 766 return AsmStrs+RegAsmOffset[RegNo-1];
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/external/llvm/lib/MC/MCParser/ |
COFFAsmParser.cpp | 141 bool ParseSEHRegisterNumber(unsigned &RegNo); 750 bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) { 776 RegNo = SEHRegNo; 784 RegNo = n;
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
X86MCTargetDesc.cpp | 143 unsigned X86_MC::getX86RegNum(unsigned RegNo) { 144 switch(RegNo) { 177 return RegNo-X86::ST0; 227 assert((int(RegNo) > 0) && "Unknown physical register!");
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/MCParser/ |
COFFAsmParser.cpp | 156 bool ParseSEHRegisterNumber(unsigned &RegNo); 820 bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) { 846 RegNo = SEHRegNo; 854 RegNo = n;
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/external/llvm/lib/Target/Lanai/InstPrinter/ |
LanaiInstPrinter.cpp | 32 void LanaiInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 33 OS << StringRef(getRegisterName(RegNo)).lower();
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/InstPrinter/ |
LanaiInstPrinter.cpp | 32 void LanaiInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 33 OS << StringRef(getRegisterName(RegNo)).lower();
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/external/llvm/lib/Target/AMDGPU/AsmParser/ |
AMDGPUAsmParser.cpp | 146 unsigned RegNo; 335 return Reg.RegNo; 510 static AMDGPUOperand::Ptr CreateReg(unsigned RegNo, SMLoc S, 516 Op->Reg.RegNo = RegNo; 579 bool subtargetHasRegister(const MCRegisterInfo &MRI, unsigned RegNo) const; 642 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 794 bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { 798 RegNo = R->getReg(); [all...] |
/external/llvm/lib/Target/X86/InstPrinter/ |
X86InstComments.cpp | 161 static unsigned getVectorRegSize(unsigned RegNo) { 162 if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31) 164 if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31) 166 if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31) 168 if (X86::MM0 <= RegNo && RegNo <= X86::MM7) [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
X86InstComments.cpp | 203 static unsigned getVectorRegSize(unsigned RegNo) { 204 if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31) 206 if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31) 208 if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31) 210 if (X86::MM0 <= RegNo && RegNo <= X86::MM7) [all...] |
/external/llvm/lib/Target/SystemZ/AsmParser/ |
SystemZAsmParser.cpp | 403 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 687 bool SystemZAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 693 RegNo = SystemZMC::GR64Regs[Reg.Num]; 695 RegNo = SystemZMC::FP64Regs[Reg.Num]; 697 RegNo = SystemZMC::VR128Regs[Reg.Num]; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
LiveDebugValues.cpp | 136 uint64_t RegNo; 147 if (int RegNo = isDbgValueDescribedByReg(MI)) { 149 Loc.RegNo = RegNo; 157 return Loc.RegNo;
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/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 155 unsigned RegNo; // For MO_Register. 177 // Register number is in SmallContents.RegNo. 351 return SmallContents.RegNo; 775 Op.SmallContents.RegNo = Reg; [all...] |