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  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1578 SDLoc &dl = CLI.DL; local
7287 DebugLoc dl = MI.getDebugLoc(); local
7401 DebugLoc dl = MI.getDebugLoc(); local
7909 DebugLoc dl = MI.getDebugLoc(); local
8229 DebugLoc dl = MI.getDebugLoc(); local
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  /external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsFrameLowering.cpp 122 DebugLoc DL = I->getDebugLoc();
128 BuildMI(MBB, I, DL, TII->get(Mips::NOAT));
129 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::AT).addImm(ImmHi);
130 BuildMI(MBB, I, DL, TII->get(Mips::ADDu), Mips::AT).addReg(OrigReg)
147 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); local
165 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
169 BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
171 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
183 BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP)
188 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO))
274 DebugLoc dl = MBBI->getDebugLoc(); local
    [all...]
  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 363 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
371 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
383 SDLoc &dl = CLI.DL; local
402 Outs, OutVals, Ins, dl, DAG, InVals);
413 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
449 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
455 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue,
458 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue,
462 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue)
1174 DebugLoc dl = MI.getDebugLoc(); local
1286 DebugLoc dl = MI.getDebugLoc(); local
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/XCore/
XCoreISelLowering.cpp 216 DebugLoc dl = Op.getDebugLoc(); local
217 SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i32, Op.getOperand(2),
219 return DAG.getNode(ISD::SELECT, dl, MVT::i32, Cond, Op.getOperand(0),
228 DebugLoc dl = GA.getDebugLoc(); local
230 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA);
240 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA);
242 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA);
253 static inline SDValue BuildGetId(SelectionDAG &DAG, DebugLoc dl) {
254 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32,
267 DebugLoc dl = Op.getDebugLoc() local
313 DebugLoc dl = CP->getDebugLoc(); local
336 DebugLoc dl = Op.getDebugLoc(); local
510 DebugLoc dl = Op.getDebugLoc(); local
556 DebugLoc dl = Op.getDebugLoc(); local
573 DebugLoc dl = Op.getDebugLoc(); local
658 DebugLoc dl = N->getDebugLoc(); local
717 DebugLoc dl = N->getDebugLoc(); local
750 DebugLoc dl = Node->getDebugLoc(); local
771 DebugLoc dl = Op.getDebugLoc(); local
783 DebugLoc dl = Op.getDebugLoc(); local
823 DebugLoc dl = Op.getDebugLoc(); local
1261 DebugLoc dl = MI->getDebugLoc(); local
1327 DebugLoc dl = N->getDebugLoc(); local
    [all...]
XCoreRegisterInfo.h 32 unsigned DstReg, int64_t Value, DebugLoc dl) const;
36 unsigned SrcReg, int Offset, DebugLoc dl) const;
40 unsigned DstReg, int Offset, DebugLoc dl) const;
  /external/llvm/lib/Target/X86/
X86SelectionDAGInfo.h 35 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
40 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMSelectionDAGInfo.h 48 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
58 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
Thumb2RegisterInfo.cpp 37 DebugLoc dl,
48 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
Thumb2RegisterInfo.h 35 DebugLoc dl,
  /external/swiftshader/third_party/LLVM/lib/Target/Alpha/
AlphaLLRP.cpp 52 DebugLoc dl; local
77 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
89 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
92 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
103 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
105 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
107 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
140 BuildMI(MBB, MBB.end(), dl, TII->get(Alpha::BISr), Alpha::R31)
AlphaISelDAGToDAG.cpp 211 DebugLoc dl = N->getDebugLoc();
235 Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R24, N1,
237 Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R25, N2,
239 Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R27, N0,
242 CurDAG->getMachineNode(Alpha::JSRs, dl, MVT::Other, MVT::Glue,
244 Chain = CurDAG->getCopyFromReg(Chain, dl, Alpha::R27, MVT::i64,
251 return CurDAG->getMachineNode(Alpha::RPCC, dl, MVT::i64, MVT::Other,
259 SDValue Result = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,
278 SDNode *Tmp = CurDAG->getMachineNode(Alpha::LDAHr, dl, MVT::i64, CPI,
330 SDNode *cmp = CurDAG->getMachineNode(Opc, dl, MVT::f64, tmp1, tmp2)
398 DebugLoc dl = N->getDebugLoc(); local
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/
Nios2ISelLowering.h 53 const SDLoc &dl, SelectionDAG &DAG,
58 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
X86SelectionDAGInfo.h 35 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
40 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 102 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, DebugLoc dl);
201 DebugLoc dl; local
207 BuildMI(EntryBB, IP, dl, TII.get(PPC::MFVRSAVE), InVRSAVE);
208 BuildMI(EntryBB, IP, dl, TII.get(PPC::UPDATE_VRSAVE),
210 BuildMI(EntryBB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(UpdatedVRSAVE);
224 BuildMI(*BB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(InVRSAVE);
239 DebugLoc dl; local
243 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR));
244 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR), GlobalBaseReg);
247 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR8))
378 DebugLoc dl = N->getDebugLoc(); local
610 DebugLoc dl = N->getDebugLoc(); local
737 DebugLoc dl = N->getDebugLoc(); local
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  /bionic/tests/
dl_test.cpp 63 TEST(dl, main_preempts_global_default) {
69 TEST(dl, main_does_not_preempt_global_protected) {
74 TEST(dl, lib_preempts_global_default) {
78 TEST(dl, lib_does_not_preempt_global_protected) {
90 TEST(dl, exec_linker) {
100 TEST(dl, exec_linker_load_file) {
115 TEST(dl, exec_linker_load_from_zip) {
130 TEST(dl, exec_linker_load_self) {
139 TEST(dl, preinit_system_calls) {
151 TEST(dl, preinit_getauxval)
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  /external/llvm/lib/Target/XCore/
XCoreISelDAGToDAG.cpp 49 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) {
50 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
133 SDLoc dl(N);
141 SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val), dl);
142 ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl,
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
166 ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32,
173 ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32,
180 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32,
187 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32
    [all...]
  /external/okhttp/website/static/
app-theme.css 7 a.dl {
19 a.dl:hover {
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/
XCoreISelDAGToDAG.cpp 49 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) {
50 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
133 SDLoc dl(N);
141 SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val), dl);
142 ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl,
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
166 ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32,
173 ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32,
180 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32,
187 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp 249 SDLoc DL(N);
262 ISD::EXTRACT_VECTOR_ELT, DL, VT, Op,
263 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
360 SDLoc DL(N);
363 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
387 SDLoc DL(N);
396 ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
397 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
399 ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
400 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())))
    [all...]
  /external/clang/test/CodeGen/
builtins-nvptx.c 187 __device__ long dl; variable
199 __nvvm_atom_add_gen_l(&dl, l);
206 __nvvm_atom_sub_gen_l(&dl, l);
213 __nvvm_atom_and_gen_l(&dl, l);
220 __nvvm_atom_or_gen_l(&dl, l);
227 __nvvm_atom_xor_gen_l(&dl, l);
234 __nvvm_atom_xchg_gen_l(&dl, l);
243 __nvvm_atom_max_gen_l(&dl, l);
245 __nvvm_atom_max_gen_ul((unsigned long *)&dl, l);
256 __nvvm_atom_min_gen_l(&dl, l)
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  /external/llvm/lib/Target/NVPTX/
NVPTXFrameLowering.cpp 42 DebugLoc dl = DebugLoc(); local
56 MI = BuildMI(MBB, MI, dl,
61 BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
  /external/llvm/lib/Target/Sparc/
SparcRegisterInfo.cpp 109 MachineInstr &MI, const DebugLoc &dl,
129 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1)
134 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
147 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1)
149 BuildMI(*MI.getParent(), II, dl, TII.get(SP::XORri), SP::G1)
152 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
167 DebugLoc dl = MI.getDebugLoc(); local
186 BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri))
188 replaceFI(MF, II, *StMI, dl, 0, Offset, FrameReg);
198 BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/PTX/
PTXISelLowering.h 53 DebugLoc dl,
63 DebugLoc dl,
73 DebugLoc dl, SelectionDAG &DAG,
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
NVPTXFrameLowering.cpp 42 DebugLoc dl = DebugLoc(); local
56 MI = BuildMI(MBB, MI, dl,
61 BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/
SparcRegisterInfo.cpp 109 MachineInstr &MI, const DebugLoc &dl,
129 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1)
134 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
147 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1)
149 BuildMI(*MI.getParent(), II, dl, TII.get(SP::XORri), SP::G1)
152 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
167 DebugLoc dl = MI.getDebugLoc(); local
186 BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri))
188 replaceFI(MF, II, *StMI, dl, 0, Offset, FrameReg);
198 BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg
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Completed in 4411 milliseconds

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