/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/ |
rv32c-invalid.s | 5 c.lw ra, 4(sp) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction 65 c.lw s0, -4(sp) # CHECK: :[[@LINE]]:11: error: immediate must be a multiple of 4 bytes in the range [0, 124]
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rv32i-valid.s | 101 # CHECK-INST: lw a0, 97(a2) 103 lw a0, 97(a2) label
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rvi-aliases-valid.s | 28 # TODO lb lh lw
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/art/runtime/arch/mips64/ |
quick_entrypoints_mips64.S | 747 lw $t0, 0($t1) 987 lw $\gpu, 0($t1) [all...] |
/external/llvm/test/MC/Mips/ |
mips-expansions.s | 16 # LW/SW and LDC1/SDC1 of symbol address, done by MipsAsmParser::expandMemInst(): 18 lw $10, symbol($4) 22 # CHECK-LE: lw $10, %lo(symbol)($10) # encoding: [A,A,0x4a,0x8d] 32 lw $8, 1f 35 # CHECK-LE: lw $8, %lo($tmp0)($8) # encoding: [A,A,0x08,0x8d] 43 lw $10, 655483($4) 46 # CHECK-LE: lw $10, 123($10) # encoding: [0x7b,0x00,0x4a,0x8d] 52 lw $8, symbol 56 # CHECK-LE: lw $8, %lo(symbol)($8) # encoding: [A,A,0x08,0x8d] [all...] |
/external/llvm/test/MC/Mips/mips1/ |
valid.s | 56 lw $8,5674($a1) 162 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips2/ |
valid.s | 76 lw $8,5674($a1) 189 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/u-boot/arch/riscv/cpu/ax25/ |
start.S | 19 #define LREG lw
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/external/v8/tools/profviz/ |
composer.js | 397 output("set style line 1 lt 1 lw 1 lc rgb \"#000000\""); 398 output("set border 15 lw 0.2"); // Draw thin border box. 399 output("set style line 2 lt 1 lw 1 lc rgb \"#9944CC\"");
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/art/runtime/mirror/ |
object-inl.h | 114 LockWord lw = GetLockWord(false); local 115 lw.SetReadBarrierState(rb_state); 116 SetLockWord(lw, false); [all...] |
/bionic/libc/arch-mips/bionic/ |
setjmp.S | 375 lw $v0, SC_FPSR_OFFSET($a0)
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/bionic/libc/arch-mips/string/ |
strcmp.S | 49 # define LW ld 56 # define LW lw 162 LW $v0, OFFSET($a0); \ 163 LW $v1, OFFSET($a1); \ 191 LW $v1, OFFSET($a1); \ 197 LW $a3, (OFFSET + NSIZE)($a2); \ 208 LW $v0, 0($a2)
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strncmp.S | 49 # define LW ld 57 # define LW lw 175 LW $v0, (OFFSET)($a0); \ 176 LW $v1, (OFFSET)($a1); \ 219 LW $v1, (OFFSET)($a1); \
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/external/llvm/test/MC/Mips/micromips64r6/ |
valid.s | 27 lw $3, 32($gp) # CHECK: lw $3, 32($gp) # encoding: [0x65,0x88] 28 lw $3, 24($sp) # CHECK: lw $3, 24($sp) # encoding: [0x48,0x66]
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/art/runtime/interpreter/mterp/mips/ |
array.S | 1 %def op_aget(load="lw", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"): 53 lw a1, THREAD_EXCEPTION_OFFSET(rSELF)
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/external/llvm/test/MC/Mips/mips3/ |
valid.s | 134 lw $8,5674($a1) 255 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips32/ |
valid.s | 84 lw $8,5674($a1) 219 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips32r2/ |
valid.s | 95 lw $8,5674($a1) 258 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips32r3/ |
valid.s | 95 lw $8,5674($a1) 258 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips32r5/ |
valid.s | 96 lw $8,5674($a1) 259 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips4/ |
valid.s | 139 lw $8,5674($a1) 284 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/llvm/test/MC/Mips/mips5/ |
valid.s | 140 lw $8,5674($a1) 286 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/ |
valid.s | 66 lw $8,5674($a1) 227 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
valid.s | 90 lw $8,5674($a1) 265 lw $3, %lo(g_8)($2) # CHECK: encoding: [0x8c,0x43,A,A]
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/external/v8/src/wasm/baseline/mips64/ |
liftoff-assembler-mips64.h | 35 assm->lw(dst.gp(), src); 259 lw(dst, MemOperand(dst, offset)); 458 lw(reg.gp(), src); [all...] |