/external/libhevc/common/arm64/ |
ihevc_deblk_luma_horz.s | 51 sxtw x5,w5 52 sxtw x6,w6
|
ihevc_deblk_luma_vert.s | 54 sxtw x5,w5 55 sxtw x6,w6
|
ihevc_intra_pred_chroma_mode_27_to_33.s | 111 sxtw x9,w9
|
/external/libxaac/decoder/armv8/ |
ixheaacd_post_twiddle_overlap.s | 56 //sxtw x4,w4 58 //sxtw x5,w5 60 //sxtw x6,w6 69 sxtw x8, w8 82 sxtw x25, w25 88 //sxtw x8,w8 95 sxtw x8, w8 97 sxtw x9, w9 100 sxtw x10, w10 144 sxtw x10, w1 [all...] |
/external/libavc/common/armv8/ |
ih264_inter_pred_luma_horz_hpel_vert_qpel_av8.s | 129 sxtw x2, w2 130 sxtw x3, w3 131 sxtw x4, w4 132 sxtw x5, w5 [all...] |
ih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s | 128 sxtw x2, w2 129 sxtw x3, w3 130 sxtw x4, w4 131 sxtw x5, w5
|
ih264_inter_pred_luma_horz_qpel_vert_qpel_av8.s | 125 sxtw x2, w2 126 sxtw x3, w3 127 sxtw x4, w4 128 sxtw x5, w5 [all...] |
ih264_deblk_luma_av8.s | 93 sxtw x1, w1 244 sxtw x1, w1 437 sxtw x1, w1 [all...] |
/external/libavc/encoder/armv8/ |
ih264e_half_pel_av8.s | 89 sxtw x2, w2 90 sxtw x3, w3 268 sxtw x3, w3 269 sxtw x4, w4 [all...] |
/external/llvm/test/MC/AArch64/ |
basic-a64-diagnostics.s | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
basic-a64-diagnostics.s | [all...] |
/external/v8/src/arm64/ |
macro-assembler-arm64-inl.h | 952 void TurboAssembler::Sxtw(const Register& rd, const Register& rn) { 955 sxtw(rd, rn); [all...] |
assembler-arm64.h | 713 // where <extend> is one of {UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX}. [all...] |
/external/v8/src/builtins/arm64/ |
builtins-arm64.cc | [all...] |
/external/vixl/src/aarch64/ |
assembler-aarch64.h | 808 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); } function in class:vixl::aarch64::Assembler [all...] |
macro-assembler-aarch64.h | [all...] |
/external/vixl/test/aarch64/ |
test-trace-aarch64.cc | 351 __ sxtw(w16, w17); 352 __ sxtw(x18, x19); [all...] |
test-disasm-aarch64.cc | 181 COMPARE(dci(0x93407c00), "sxtw x0, w0"); 201 COMPARE_MACRO(Mov(x16, Operand(x17, SXTW, 3)), "sbfiz x16, x17, #3, #32"); 440 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1"); 466 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1"); 612 COMPARE(sxtw(x8, x9), "sxtw x8, w9"); 615 COMPARE(sxtw(x4, w5), "sxtw x4, w5") [all...] |
test-cpu-features-aarch64.cc | 235 TEST_NONE(cmn_2, cmn(x0, Operand(w1, SXTW, 3))) 299 TEST_NONE(ldrb_4, ldrb(w0, MemOperand(x1, w2, SXTW, 0))) 316 TEST_NONE(ldrsb_10, ldrsb(x0, MemOperand(x1, w2, SXTW, 0))) 326 TEST_NONE(ldrsh_8, ldrsh(x0, MemOperand(x1, w2, SXTW, 0))) 332 TEST_NONE(ldrsw_4, ldrsw(x0, MemOperand(x1, w2, SXTW, 0))) 342 TEST_NONE(ldr_8, ldr(w0, MemOperand(x1, w2, SXTW, 0))) 404 TEST_NONE(prfm_2, prfm(PLDL1KEEP, MemOperand(x0, w1, SXTW, 0))) 455 TEST_NONE(strb_4, strb(w0, MemOperand(x1, w2, SXTW, 0))) 468 TEST_NONE(str_6, str(w0, MemOperand(x1, w2, SXTW, 2))) 489 TEST_NONE(sub_0, sub(w0, w1, Operand(w2, SXTW, 0)) [all...] |