| /external/u-boot/include/power/ |
| tps65217.h | 13 #define TPS65217_CHIP_PM 0x24
|
| tps65218.h | 13 #define TPS65218_CHIP_PM 0x24
|
| tps65910.h | 21 TPS65910_VDD2_REG = 0x24,
|
| /external/vboot_reference/firmware/2lib/include/ |
| 2recovery_reasons.h | 86 VB2_RECOVERY_DEP_EC_HASH = 0x24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| macro-div.s | 12 # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
24 # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
38 # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
50 # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
87 # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
90 # CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
103 # CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x24,0x01,0x80,0x00]
106 # CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x24,0x01,0x80,0x00]
134 # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
146 # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff
[all...] |
| rotations64.s | 11 # CHECK-64: srlv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x06]
15 # CHECK-64R: rotrv $4, $4, $1 # encoding: [0x00,0x24,0x20,0x46]
25 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
33 # CHECK-64R: rotr $4, $4, 31 # encoding: [0x00,0x24,0x27,0xc2]
43 # CHECK-64R: rotr $4, $4, 30 # encoding: [0x00,0x24,0x27,0x82]
52 # CHECK-64: sllv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x04]
64 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
72 # CHECK-64R: rotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x42]
82 # CHECK-64R: rotr $4, $4, 2 # encoding: [0x00,0x24,0x20,0x82]
91 # CHECK-64: dsrlv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x16
[all...] |
| /external/vixl/test/aarch32/traces/ |
| assembler-cond-rd-rn-rm-smulwb-a32.h | 50 0xa6, 0x03, 0x24, 0xb1 // smulwb lt r4 r6 r3
95 0xad, 0x0b, 0x24, 0xa1 // smulwb ge r4 r13 r11
116 0xa7, 0x0a, 0x24, 0x31 // smulwb cc r4 r7 r10
152 0xa8, 0x06, 0x24, 0xb1 // smulwb lt r4 r8 r6
233 0xa5, 0x0e, 0x24, 0x51 // smulwb pl r4 r5 r14
251 0xad, 0x0c, 0x24, 0xb1 // smulwb lt r4 r13 r12
296 0xa4, 0x09, 0x24, 0x21 // smulwb cs r4 r4 r9
305 0xa3, 0x0b, 0x24, 0xc1 // smulwb gt r4 r3 r11
377 0xac, 0x0a, 0x24, 0xb1 // smulwb lt r4 r12 r10
404 0xa3, 0x0e, 0x24, 0x81 // smulwb hi r4 r3 r1
[all...] |
| assembler-cond-rd-rn-rm-smulwt-a32.h | 50 0xe6, 0x03, 0x24, 0xb1 // smulwt lt r4 r6 r3
95 0xed, 0x0b, 0x24, 0xa1 // smulwt ge r4 r13 r11
116 0xe7, 0x0a, 0x24, 0x31 // smulwt cc r4 r7 r10
152 0xe8, 0x06, 0x24, 0xb1 // smulwt lt r4 r8 r6
233 0xe5, 0x0e, 0x24, 0x51 // smulwt pl r4 r5 r14
251 0xed, 0x0c, 0x24, 0xb1 // smulwt lt r4 r13 r12
296 0xe4, 0x09, 0x24, 0x21 // smulwt cs r4 r4 r9
305 0xe3, 0x0b, 0x24, 0xc1 // smulwt gt r4 r3 r11
377 0xec, 0x0a, 0x24, 0xb1 // smulwt lt r4 r12 r10
404 0xe3, 0x0e, 0x24, 0x81 // smulwt hi r4 r3 r1
[all...] |
| assembler-cond-rd-rn-operand-rm-bic-t32.h | 41 0x24, 0xea, 0x0a, 0x03 // bic al r3 r4 r10
68 0x24, 0xea, 0x02, 0x04 // bic al r4 r4 r2
86 0x24, 0xea, 0x0e, 0x0b // bic al r11 r4 r14
143 0x24, 0xea, 0x07, 0x09 // bic al r9 r4 r7
149 0x24, 0xea, 0x04, 0x0c // bic al r12 r4 r4
251 0x24, 0xea, 0x09, 0x0e // bic al r14 r4 r9
272 0x24, 0xea, 0x01, 0x06 // bic al r6 r4 r1
302 0x24, 0xea, 0x07, 0x04 // bic al r4 r4 r7
311 0x24, 0xea, 0x07, 0x0a // bic al r10 r4 r7
329 0x24, 0xea, 0x03, 0x0a // bic al r10 r4 r
[all...] |
| assembler-cond-rd-rn-operand-rm-lsr-t32.h | 41 0x24, 0xfa, 0x0a, 0xf3 // lsr al r3 r4 r10
68 0x24, 0xfa, 0x02, 0xf4 // lsr al r4 r4 r2
86 0x24, 0xfa, 0x0e, 0xfb // lsr al r11 r4 r14
143 0x24, 0xfa, 0x07, 0xf9 // lsr al r9 r4 r7
149 0x24, 0xfa, 0x04, 0xfc // lsr al r12 r4 r4
251 0x24, 0xfa, 0x09, 0xfe // lsr al r14 r4 r9
272 0x24, 0xfa, 0x01, 0xf6 // lsr al r6 r4 r1
302 0x24, 0xfa, 0x07, 0xf4 // lsr al r4 r4 r7
311 0x24, 0xfa, 0x07, 0xfa // lsr al r10 r4 r7
329 0x24, 0xfa, 0x03, 0xfa // lsr al r10 r4 r
[all...] |
| assembler-cond-rd-rn-operand-rm-shift-amount-1to31-eor-a32.h | 89 0x67, 0x15, 0x24, 0xc0 // eor gt r1 r4 r7 ROR 10
113 0x6b, 0xd4, 0x24, 0xb0 // eor lt r13 r4 r11 ROR 8
233 0x05, 0x24, 0x24, 0x80 // eor hi r2 r4 r5 LSL 8
263 0x6a, 0x15, 0x24, 0x20 // eor cs r1 r4 r10 ROR 10
305 0x09, 0xd1, 0x24, 0x30 // eor cc r13 r4 r9 LSL 2
308 0x87, 0xdd, 0x24, 0x30 // eor cc r13 r4 r7 LSL 27
317 0xe0, 0x1e, 0x24, 0xb0 // eor lt r1 r4 r0 ROR 29
353 0x68, 0x97, 0x24, 0x50 // eor pl r9 r4 r8 ROR 14
449 0x67, 0x04, 0x24, 0x50 // eor pl r0 r4 r7 ROR
[all...] |
| assembler-cond-rd-rn-operand-rm-sxtab16-t32.h | 41 0x24, 0xfa, 0x8a, 0xf3 // sxtab16 al r3 r4 r10
68 0x24, 0xfa, 0x82, 0xf4 // sxtab16 al r4 r4 r2
86 0x24, 0xfa, 0x8e, 0xfb // sxtab16 al r11 r4 r14
143 0x24, 0xfa, 0x87, 0xf9 // sxtab16 al r9 r4 r7
149 0x24, 0xfa, 0x84, 0xfc // sxtab16 al r12 r4 r4
251 0x24, 0xfa, 0x89, 0xfe // sxtab16 al r14 r4 r9
272 0x24, 0xfa, 0x81, 0xf6 // sxtab16 al r6 r4 r1
302 0x24, 0xfa, 0x87, 0xf4 // sxtab16 al r4 r4 r7
311 0x24, 0xfa, 0x87, 0xfa // sxtab16 al r10 r4 r7
329 0x24, 0xfa, 0x83, 0xfa // sxtab16 al r10 r4 r
[all...] |
| assembler-cond-rd-rn-operand-const-eor-a32.h | 38 0xff, 0x97, 0x24, 0xd2 // eor le r9 r4 0x03fc0000
50 0xab, 0xe2, 0x24, 0x52 // eor pl r14 r4 0xb000000a
110 0xab, 0xf0, 0x24, 0x82 // eor hi r15 r4 0x000000ab
134 0xab, 0x92, 0x24, 0x62 // eor vs r9 r4 0xb000000a
146 0xab, 0x2c, 0x24, 0x22 // eor cs r2 r4 0x0000ab00
179 0xff, 0x89, 0x24, 0x62 // eor vs r8 r4 0x003fc000
290 0xab, 0xe3, 0x24, 0x72 // eor vc r14 r4 0xac000002
302 0xab, 0x44, 0x24, 0xd2 // eor le r4 r4 0xab000000
305 0xff, 0xb6, 0x24, 0xc2 // eor gt r11 r4 0x0ff00000
338 0xab, 0x92, 0x24, 0x72 // eor vc r9 r4 0xb000000
[all...] |
| assembler-cond-rd-rn-operand-rm-ror-amount-sxtab16-t32.h | 59 0x24, 0xfa, 0xab, 0xfe // sxtab16 al r14 r4 r11 ROR 16
224 0x24, 0xfa, 0xaa, 0xf6 // sxtab16 al r6 r4 r10 ROR 16
317 0x24, 0xfa, 0x8c, 0xfe // sxtab16 al r14 r4 r12 ROR 0
404 0x24, 0xfa, 0xb2, 0xf4 // sxtab16 al r4 r4 r2 ROR 24
413 0x24, 0xfa, 0x80, 0xf6 // sxtab16 al r6 r4 r0 ROR 0
431 0x24, 0xfa, 0xbb, 0xfb // sxtab16 al r11 r4 r11 ROR 24
437 0x24, 0xfa, 0xa8, 0xf5 // sxtab16 al r5 r4 r8 ROR 16
512 0x24, 0xfa, 0xad, 0xf8 // sxtab16 al r8 r4 r13 ROR 16
530 0x24, 0xfa, 0x94, 0xf4 // sxtab16 al r4 r4 r4 ROR 8
578 0x24, 0xfa, 0x9c, 0xfb // sxtab16 al r11 r4 r12 ROR
[all...] |
| assembler-cond-rd-rn-operand-const-bic-t32.h | 137 0x24, 0xf4, 0xab, 0x09 // bic al r9 r4 0x00558000
203 0x24, 0xf0, 0xff, 0x03 // bic al r3 r4 0x000000ff
227 0x24, 0xf4, 0xff, 0x5e // bic al r14 r4 0x00001fe0
281 0x24, 0xf4, 0x2b, 0x77 // bic al r7 r4 0x000002ac
305 0x24, 0xf4, 0xff, 0x75 // bic al r5 r4 0x000001fe
314 0x24, 0xf4, 0x2b, 0x59 // bic al r9 r4 0x00002ac0
347 0x24, 0xf0, 0x2b, 0x61 // bic al r1 r4 0x0ab00000
374 0x24, 0xf0, 0x7f, 0x52 // bic al r2 r4 0x3fc00000
398 0x24, 0xf0, 0xab, 0x62 // bic al r2 r4 0x05580000
437 0x24, 0xf0, 0xff, 0x16 // bic al r6 r4 0x00ff00f
[all...] |
| assembler-cond-rd-rn-operand-rm-eor-a32.h | 65 0x09, 0x20, 0x24, 0xc0 // eor gt r2 r4 r9
122 0x02, 0x90, 0x24, 0xe0 // eor al r9 r4 r2
137 0x0c, 0x50, 0x24, 0x20 // eor cs r5 r4 r12
233 0x00, 0x60, 0x24, 0x20 // eor cs r6 r4 r0
257 0x09, 0x20, 0x24, 0x80 // eor hi r2 r4 r9
281 0x03, 0x60, 0x24, 0x00 // eor eq r6 r4 r3
386 0x03, 0xe0, 0x24, 0xe0 // eor al r14 r4 r3
443 0x03, 0x70, 0x24, 0x30 // eor cc r7 r4 r3
485 0x03, 0x00, 0x24, 0xd0 // eor le r0 r4 r3
500 0x08, 0xe0, 0x24, 0x10 // eor ne r14 r4 r
[all...] |
| assembler-cond-rd-rn-operand-rm-shift-amount-1to32-eor-a32.h | 95 0x4d, 0x10, 0x24, 0x70 // eor vc r1 r4 r13 ASR 32
128 0xc0, 0x78, 0x24, 0x10 // eor ne r7 r4 r0 ASR 17
191 0x2b, 0x27, 0x24, 0x20 // eor cs r2 r4 r11 LSR 14
212 0xa9, 0x47, 0x24, 0xd0 // eor le r4 r4 r9 LSR 15
230 0xa3, 0x66, 0x24, 0x50 // eor pl r6 r4 r3 LSR 13
251 0x24, 0x0f, 0x2a, 0x70 // eor vc r0 r10 r4 LSR 30
275 0x24, 0x26, 0x29, 0x00 // eor eq r2 r9 r4 LSR 12
299 0x47, 0xd5, 0x24, 0x60 // eor vs r13 r4 r7 ASR 10
308 0x24, 0xb2, 0x27, 0x30 // eor cc r11 r7 r4 LSR 4
329 0xa4, 0xaf, 0x24, 0xa0 // eor ge r10 r4 r4 LSR 3
[all...] |
| assembler-cond-rd-rn-rm-smuad-t32.h | 125 0x24, 0xfb, 0x03, 0xf8 // smuad al r8 r4 r3
158 0x24, 0xfb, 0x0d, 0xf0 // smuad al r0 r4 r13
179 0x24, 0xfb, 0x0c, 0xf6 // smuad al r6 r4 r12
194 0x24, 0xfb, 0x0b, 0xfe // smuad al r14 r4 r11
221 0x24, 0xfb, 0x03, 0xf1 // smuad al r1 r4 r3
266 0x24, 0xfb, 0x02, 0xfb // smuad al r11 r4 r2
272 0x24, 0xfb, 0x01, 0xfc // smuad al r12 r4 r1
308 0x24, 0xfb, 0x0d, 0xfc // smuad al r12 r4 r13
320 0x24, 0xfb, 0x06, 0xfb // smuad al r11 r4 r6
335 0x24, 0xfb, 0x01, 0xf1 // smuad al r1 r4 r
[all...] |
| assembler-cond-rd-rn-rm-smuadx-t32.h | 125 0x24, 0xfb, 0x13, 0xf8 // smuadx al r8 r4 r3
158 0x24, 0xfb, 0x1d, 0xf0 // smuadx al r0 r4 r13
179 0x24, 0xfb, 0x1c, 0xf6 // smuadx al r6 r4 r12
194 0x24, 0xfb, 0x1b, 0xfe // smuadx al r14 r4 r11
221 0x24, 0xfb, 0x13, 0xf1 // smuadx al r1 r4 r3
266 0x24, 0xfb, 0x12, 0xfb // smuadx al r11 r4 r2
272 0x24, 0xfb, 0x11, 0xfc // smuadx al r12 r4 r1
308 0x24, 0xfb, 0x1d, 0xfc // smuadx al r12 r4 r13
320 0x24, 0xfb, 0x16, 0xfb // smuadx al r11 r4 r6
335 0x24, 0xfb, 0x11, 0xf1 // smuadx al r1 r4 r
[all...] |
| assembler-cond-rd-rn-operand-rm-shift-rs-eor-a32.h | 41 0x7d, 0xb8, 0x24, 0x30 // eor cc r11 r4 r13 ROR r8
89 0x16, 0xc5, 0x24, 0xb0 // eor lt r12 r4 r6 LSL r5
185 0x7a, 0xa8, 0x24, 0xd0 // eor le r10 r4 r10 ROR r8
269 0x11, 0x6c, 0x24, 0x10 // eor ne r6 r4 r1 LSL r12
275 0x5d, 0x25, 0x24, 0xb0 // eor lt r2 r4 r13 ASR r5
335 0x3e, 0xda, 0x24, 0x40 // eor mi r13 r4 r14 LSR r10
353 0x1a, 0x67, 0x24, 0xb0 // eor lt r6 r4 r10 LSL r7
488 0x77, 0x0d, 0x24, 0x10 // eor ne r0 r4 r7 ROR r13
533 0x1d, 0x9d, 0x24, 0xa0 // eor ge r9 r4 r13 LSL r13
587 0x31, 0x50, 0x24, 0x30 // eor cc r5 r4 r1 LSR r
[all...] |
| /external/grpc-grpc/test/core/tsi/alts/crypt/ |
| aes_gcm_test.cc | [all...] |
| /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/ |
| pvmp3_mdct_18_gcc.s | 48 add r3,r2,#0x24
94 add r0,r5,#0x24 @@ r0 = &vec[9]
117 ldr r12,[r5,#0x24]
129 str r0,[r5,#0x24]
186 ldr r3,[r5,#0x24]
194 ldr lr,[r7,#0x24]
195 ldr r3,[r6,#0x24]
200 str r3,[r5,#0x24]
274 str r0,[r6,#0x24]
|
| /external/epid-sdk/epid/common/1.1/src/ |
| epid11params_tate.inc | 29 0x09, 0xF9, 0x24, 0xE5, 0xD9, 0xBC, 0x67, 0x7F, 0x81, 0x0D, 0xF0, 0x25,
38 0x16, 0x3E, 0x68, 0x24, 0x3A, 0x84, 0x78, 0x1C, 0x0A, 0xDF, 0x9B, 0xB3,
59 0xAA, 0xFB, 0x1C, 0xFD, 0xAE, 0x15, 0xCA, 0x29, 0x79, 0xA6, 0x24, 0xA4,
66 0x7E, 0xF8, 0xA6, 0x39, 0xAE, 0x46, 0xAA, 0x24
71 0x28, 0x5E, 0x56, 0xCC, 0x26, 0x51, 0x24, 0x93, 0x0E, 0x6C, 0x99, 0x96,
74 0xB0, 0x0C, 0x20, 0x5E, 0xAB, 0xAA, 0x24, 0x31, 0xE2, 0x2A, 0xA2, 0x53,
109 0x63, 0x53, 0xC8, 0x24, 0x3C, 0x7C, 0x1F, 0x4C, 0xDA, 0xCD, 0xE5, 0x5F,
|
| /external/llvm/test/MC/Mips/ |
| rotations64.s | 11 # CHECK-64: srlv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x06]
15 # CHECK-64R: rotrv $4, $4, $1 # encoding: [0x00,0x24,0x20,0x46]
25 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
33 # CHECK-64R: rotr $4, $4, 31 # encoding: [0x00,0x24,0x27,0xc2]
43 # CHECK-64R: rotr $4, $4, 30 # encoding: [0x00,0x24,0x27,0x82]
52 # CHECK-64: sllv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x04]
64 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
72 # CHECK-64R: rotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x42]
82 # CHECK-64R: rotr $4, $4, 2 # encoding: [0x00,0x24,0x20,0x82]
91 # CHECK-64: dsrlv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x16
[all...] |
| /cts/tests/tests/net/src/android/net/wifi/cts/ |
| FakeKeys.java | 148 (byte) 0x8a, (byte) 0x24, (byte) 0x24, (byte) 0xe6, (byte) 0x29, (byte) 0x0d,
157 (byte) 0x59, (byte) 0xc3, (byte) 0x24, (byte) 0x1d, (byte) 0x33, (byte) 0x98,
171 (byte) 0xe6, (byte) 0x3d, (byte) 0xeb, (byte) 0x24, (byte) 0xc2, (byte) 0xdc,
206 (byte) 0x2b, (byte) 0xc1, (byte) 0xf9, (byte) 0x24, (byte) 0x7b, (byte) 0xce,
217 (byte) 0xc6, (byte) 0x78, (byte) 0x25, (byte) 0x24, (byte) 0x90, (byte) 0x90,
|
