1 ; Test vector division on z14. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s 4 5 ; Test a v4f32 division. 6 define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1, 7 <4 x float> %val2) { 8 ; CHECK-LABEL: f1: 9 ; CHECK: vfdsb %v24, %v26, %v28 10 ; CHECK: br %r14 11 %ret = fdiv <4 x float> %val1, %val2 12 ret <4 x float> %ret 13 } 14 15 ; Test an f32 division that uses vector registers. 16 define float @f2(<4 x float> %val1, <4 x float> %val2) { 17 ; CHECK-LABEL: f2: 18 ; CHECK: wfdsb %f0, %v24, %v26 19 ; CHECK: br %r14 20 %scalar1 = extractelement <4 x float> %val1, i32 0 21 %scalar2 = extractelement <4 x float> %val2, i32 0 22 %ret = fdiv float %scalar1, %scalar2 23 ret float %ret 24 } 25
