1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 4 * Scott McNutt <smcnutt (at) psyent.com> 5 */ 6 7 #ifndef __ASM_NIOS2_IO_H_ 8 #define __ASM_NIOS2_IO_H_ 9 10 static inline void sync(void) 11 { 12 __asm__ __volatile__ ("sync" : : : "memory"); 13 } 14 15 /* 16 * Given a physical address and a length, return a virtual address 17 * that can be used to access the memory range with the caching 18 * properties specified by "flags". 19 */ 20 #define MAP_NOCACHE 1 21 22 static inline void * 23 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 24 { 25 DECLARE_GLOBAL_DATA_PTR; 26 if (flags) 27 return (void *)(paddr | gd->arch.io_region_base); 28 else 29 return (void *)(paddr | gd->arch.mem_region_base); 30 } 31 #define map_physmem map_physmem 32 33 static inline void *phys_to_virt(phys_addr_t paddr) 34 { 35 DECLARE_GLOBAL_DATA_PTR; 36 37 return (void *)(paddr | gd->arch.mem_region_base); 38 } 39 #define phys_to_virt phys_to_virt 40 41 static inline phys_addr_t virt_to_phys(void * vaddr) 42 { 43 DECLARE_GLOBAL_DATA_PTR; 44 return (phys_addr_t)vaddr & gd->arch.physaddr_mask; 45 } 46 #define virt_to_phys virt_to_phys 47 48 #define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) 49 #define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) 50 #define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) 51 52 #define __raw_readb(a) (*(volatile unsigned char *)(a)) 53 #define __raw_readw(a) (*(volatile unsigned short *)(a)) 54 #define __raw_readl(a) (*(volatile unsigned int *)(a)) 55 56 #define readb(addr)\ 57 ({unsigned char val;\ 58 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 59 #define readw(addr)\ 60 ({unsigned short val;\ 61 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 62 #define readl(addr)\ 63 ({unsigned long val;\ 64 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 65 66 #define writeb(val,addr)\ 67 asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr)) 68 #define writew(val,addr)\ 69 asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr)) 70 #define writel(val,addr)\ 71 asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr)) 72 73 #define inb(addr) readb(addr) 74 #define inw(addr) readw(addr) 75 #define inl(addr) readl(addr) 76 #define outb(val, addr) writeb(val,addr) 77 #define outw(val, addr) writew(val,addr) 78 #define outl(val, addr) writel(val,addr) 79 80 static inline void insb (unsigned long port, void *dst, unsigned long count) 81 { 82 unsigned char *p = dst; 83 while (count--) *p++ = inb (port); 84 } 85 static inline void insw (unsigned long port, void *dst, unsigned long count) 86 { 87 unsigned short *p = dst; 88 while (count--) *p++ = inw (port); 89 } 90 static inline void insl (unsigned long port, void *dst, unsigned long count) 91 { 92 unsigned long *p = dst; 93 while (count--) *p++ = inl (port); 94 } 95 96 static inline void outsb (unsigned long port, const void *src, unsigned long count) 97 { 98 const unsigned char *p = src; 99 while (count--) outb (*p++, port); 100 } 101 102 static inline void outsw (unsigned long port, const void *src, unsigned long count) 103 { 104 const unsigned short *p = src; 105 while (count--) outw (*p++, port); 106 } 107 static inline void outsl (unsigned long port, const void *src, unsigned long count) 108 { 109 const unsigned long *p = src; 110 while (count--) outl (*p++, port); 111 } 112 113 /* 114 * Clear and set bits in one shot. These macros can be used to clear and 115 * set multiple bits in a register using a single call. These macros can 116 * also be used to set a multiple-bit bit pattern using a mask, by 117 * specifying the mask in the 'clear' parameter and the new bit pattern 118 * in the 'set' parameter. 119 */ 120 121 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) 122 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) 123 124 #define out_le32(a,v) out_arch(l,le32,a,v) 125 #define out_le16(a,v) out_arch(w,le16,a,v) 126 127 #define in_le32(a) in_arch(l,le32,a) 128 #define in_le16(a) in_arch(w,le16,a) 129 130 #define out_be32(a,v) out_arch(l,be32,a,v) 131 #define out_be16(a,v) out_arch(w,be16,a,v) 132 133 #define in_be32(a) in_arch(l,be32,a) 134 #define in_be16(a) in_arch(w,be16,a) 135 136 #define out_8(a,v) __raw_writeb(v,a) 137 #define in_8(a) __raw_readb(a) 138 139 #define clrbits(type, addr, clear) \ 140 out_##type((addr), in_##type(addr) & ~(clear)) 141 142 #define setbits(type, addr, set) \ 143 out_##type((addr), in_##type(addr) | (set)) 144 145 #define clrsetbits(type, addr, clear, set) \ 146 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 147 148 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 149 #define setbits_be32(addr, set) setbits(be32, addr, set) 150 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 151 152 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 153 #define setbits_le32(addr, set) setbits(le32, addr, set) 154 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 155 156 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 157 #define setbits_be16(addr, set) setbits(be16, addr, set) 158 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 159 160 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 161 #define setbits_le16(addr, set) setbits(le16, addr, set) 162 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 163 164 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 165 #define setbits_8(addr, set) setbits(8, addr, set) 166 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 167 168 #define memset_io(a, b, c) memset((void *)(a), (b), (c)) 169 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) 170 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) 171 172 #include <asm-generic/io.h> 173 174 #endif /* __ASM_NIOS2_IO_H_ */ 175
