Lines Matching full:mir
27 static bool genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct,
38 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
41 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
49 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
54 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
62 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
69 switch (mir->dalvikInsn.opCode) {
108 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
115 switch (mir->dalvikInsn.opCode) {
154 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir)
156 OpCode opCode = mir->dalvikInsn.opCode;
160 return genConversionCall(cUnit, mir, (void*)__aeabi_i2f, 1, 1);
162 return genConversionCall(cUnit, mir, (void*)__aeabi_f2iz, 1, 1);
164 return genConversionCall(cUnit, mir, (void*)__aeabi_d2f, 2, 1);
166 return genConversionCall(cUnit, mir, (void*)__aeabi_f2d, 1, 2);
168 return genConversionCall(cUnit, mir, (void*)__aeabi_i2d, 1, 2);
170 return genConversionCall(cUnit, mir, (void*)__aeabi_d2iz, 2, 1);
172 return genConversionCall(cUnit, mir, (void*)dvmJitf2l, 1, 2);
174 return genConversionCall(cUnit, mir, (void*)__aeabi_l2f, 2, 1);
176 return genConversionCall(cUnit, mir, (void*)dvmJitd2l, 2, 2);
178 return genConversionCall(cUnit, mir, (void*)__aeabi_l2d, 2, 2);
238 static void genIGetWide(CompilationUnit *cUnit, MIR *mir, int fieldOffset)
240 DecodedInstruction *dInsn = &mir->dalvikInsn;
241 RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 0);
242 RegLocation rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
249 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset,
263 static void genIPutWide(CompilationUnit *cUnit, MIR *mir, int fieldOffset)
265 DecodedInstruction *dInsn = &mir->dalvikInsn;
266 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
267 RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 2);
271 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset,
287 static void genIGet(CompilationUnit *cUnit, MIR *mir, OpSize size,
292 DecodedInstruction *dInsn = &mir->dalvikInsn;
293 RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 0);
294 RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
297 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset,
301 loadBaseDisp(cUnit, mir, rlObj.lowReg, fieldOffset, rlResult.lowReg,
312 static void genIPut(CompilationUnit *cUnit, MIR *mir, OpSize size,
315 DecodedInstruction *dInsn = &mir->dalvikInsn;
316 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
317 RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 1);
321 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset,
333 static void genArrayGet(CompilationUnit *cUnit, MIR *mir, OpSize size,
347 if (!(mir->OptimizationFlags & MIR_IGNORE_NULL_CHECK)) {
349 rlArray.lowReg, mir->offset, NULL);
354 if (!(mir->OptimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
360 genBoundsCheck(cUnit, rlIndex.lowReg, regLen, mir->offset,
401 static void genArrayPut(CompilationUnit *cUnit, MIR *mir, OpSize size,
423 if (!(mir->OptimizationFlags & MIR_IGNORE_NULL_CHECK)) {
425 mir->offset, NULL);
428 if (!(mir->OptimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
435 genBoundsCheck(cUnit, rlIndex.lowReg, regLen, mir->offset,
475 static void genArrayObjectPut(CompilationUnit *cUnit, MIR *mir,
495 if (!(mir->OptimizationFlags & MIR_IGNORE_NULL_CHECK)) {
497 mir->offset, NULL);
500 if (!(mir->OptimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
505 genBoundsCheck(cUnit, regIndex, regLen, mir->offset,
536 genRegImmCheck(cUnit, kArmCondEq, r0, 0, mir->offset, pcrLabel);
551 static bool genShiftOpLong(CompilationUnit *cUnit, MIR *mir,
563 switch( mir->dalvikInsn.opCode) {
584 static bool genArithOpLong(CompilationUnit *cUnit, MIR *mir,
595 switch (mir->dalvikInsn.opCode) {
664 genLong3Addr(cUnit, mir, firstOp, secondOp, rlDest, rlSrc1, rlSrc2);
682 static bool genArithOpInt(CompilationUnit *cUnit, MIR *mir,
695 switch (mir->dalvikInsn.opCode) {
760 mir->dalvikInsn.opCode, mir->dalvikInsn.opCode);
792 genNullCheck(cUnit, rlSrc2.sRegLow, r1, mir->offset, NULL);
805 static bool genArithOp(CompilationUnit *cUnit, MIR *mir)
807 OpCode opCode = mir->dalvikInsn.opCode;
812 if (mir->ssaRep->numUses == 2) {
813 rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0);
814 rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 1);
815 } else if (mir->ssaRep->numUses == 3) {
816 rlSrc1 = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
817 rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 2);
819 rlSrc1 = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
820 rlSrc2 = dvmCompilerGetSrcWide(cUnit, mir, 2, 3);
821 assert(mir->ssaRep->numUses == 4);
823 if (mir->ssaRep->numDefs == 1) {
824 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
826 assert(mir->ssaRep->numDefs == 2);
827 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
831 return genArithOpLong(cUnit,mir, rlDest, rlSrc1, rlSrc2);
834 return genArithOpLong(cUnit,mir, rlDest, rlSrc1, rlSrc2);
837 return genShiftOpLong(cUnit,mir, rlDest, rlSrc1, rlSrc2);
840 return genShiftOpLong(cUnit,mir, rlDest, rlSrc1, rlSrc2);
843 return genArithOpInt(cUnit,mir, rlDest, rlSrc1, rlSrc2);
846 return genArithOpInt(cUnit,mir, rlDest, rlSrc1, rlSrc2);
849 return genArithOpFloat(cUnit,mir, rlDest, rlSrc1, rlSrc2);
852 return genArithOpFloat(cUnit, mir, rlDest, rlSrc1, rlSrc2);
855 return genArithOpDouble(cUnit,mir, rlDest, rlSrc1, rlSrc2);
858 return genArithOpDouble(cUnit,mir, rlDest, rlSrc1, rlSrc2);
872 static void genReturnCommon(CompilationUnit *cUnit, MIR *mir)
878 int dPC = (int) (cUnit->method->insns + mir->offset);
885 pcrLabel->operands[1] = mir->offset;
892 static void genProcessArgsNoRange(CompilationUnit *cUnit, MIR *mir,
909 rlArg = dvmCompilerGetSrc(cUnit, mir, numDone++);
918 *pcrLabel = genNullCheck(cUnit, dvmCompilerSSASrc(mir, 0), r0,
919 mir->offset, NULL);
925 static void genProcessArgsRange(CompilationUnit *cUnit, MIR *mir,
959 *pcrLabel = genNullCheck(cUnit, dvmCompilerSSASrc(mir, 0), r0,
960 mir->offset, NULL);
1018 static void genInvokeSingletonCommon(CompilationUnit *cUnit, MIR *mir,
1036 (int) (cUnit->method->insns + mir->offset));
1057 genTrap(cUnit, mir->offset, pcrLabel);
1080 static void genInvokeVirtualCommon(CompilationUnit *cUnit, MIR *mir,
1098 (int) (cUnit->method->insns + mir->offset));
1118 int dPC = (int) (cUnit->method->insns + mir->offset);
1122 pcrLabel->operands[1] = mir->offset;
1176 genTrap(cUnit, mir->offset, pcrLabel);
1191 MIR *mir)
1227 (int) (cUnit->method->insns + mir->offset));
1255 static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir)
1257 int flags = dexGetInstrFlags(gDvm.instrFlags, mir->dalvikInsn.opCode);
1262 if (mir->dalvikInsn.opCode == OP_NOP)
1268 if ((mir->next == NULL) || (flags & flagsToCheck)) {
1269 genPuntToInterp(cUnit, mir->offset);
1276 loadConstant(cUnit, r0, (int) (cUnit->method->insns + mir->offset));
1278 loadConstant(cUnit, r1, (int) (cUnit->method->insns + mir->next->offset));
1293 static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir)
1295 bool isEnter = (mir->dalvikInsn.opCode == OP_MONITOR_ENTER);
1296 genExportPC(cUnit, mir);
1298 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1301 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
1304 loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
1318 (int) (cUnit->method->insns + mir->offset +
1334 static bool handleFmt10t_Fmt20t_Fmt30t(CompilationUnit *cUnit, MIR *mir,
1342 static bool handleFmt10x(CompilationUnit *cUnit, MIR *mir)
1344 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
1352 genReturnCommon(cUnit,mir);
1367 static bool handleFmt11n_Fmt31i(CompilationUnit *cUnit, MIR *mir)
1371 if (mir->ssaRep->numDefs == 2) {
1372 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
1374 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1377 switch (mir->dalvikInsn.opCode) {
1381 loadConstantNoClobber(cUnit, rlResult.lowReg, mir->dalvikInsn.vB);
1389 loadConstantNoClobber(cUnit, rlResult.lowReg, mir->dalvikInsn.vB);
1401 static bool handleFmt21h(CompilationUnit *cUnit, MIR *mir)
1405 if (mir->ssaRep->numDefs == 2) {
1406 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
1408 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1412 switch (mir->dalvikInsn.opCode) {
1415 mir->dalvikInsn.vB << 16);
1421 0, mir->dalvikInsn.vB << 16);
1431 static bool handleFmt20bc(CompilationUnit *cUnit, MIR *mir)
1434 genInterpSingleStep(cUnit, mir);
1438 static bool handleFmt21c_Fmt31c(CompilationUnit *cUnit, MIR *mir)
1444 switch (mir->dalvikInsn.opCode) {
1448 (cUnit->method->clazz->pDvmDex->pResStrings[mir->dalvikInsn.vB]);
1450 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1458 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vB]);
1460 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1475 (cUnit->method->clazz->pDvmDex->pResFields[mir->dalvikInsn.vB]);
1477 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1491 (cUnit->method->clazz->pDvmDex->pResFields[mir->dalvikInsn.vB]);
1494 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
1514 (cUnit->method->clazz->pDvmDex->pResFields[mir->dalvikInsn.vB]);
1517 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1531 (cUnit->method->clazz->pDvmDex->pResFields[mir->dalvikInsn.vB]);
1534 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1549 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vB]);
1558 genExportPC(cUnit, mir);
1571 (int) (cUnit->method->insns + mir->offset));
1578 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1589 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vB]);
1600 genInterpSingleStep(cUnit, mir);
1605 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1627 genZeroCheck(cUnit, r0, mir->offset, NULL);
1641 static bool handleFmt11x(CompilationUnit *cUnit, MIR *mir)
1643 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
1651 RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1662 RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1669 RegLocation rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
1676 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1680 genReturnCommon(cUnit,mir);
1685 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1689 genReturnCommon(cUnit,mir);
1695 genMonitorPortable(cUnit, mir);
1697 genMonitor(cUnit, mir);
1701 genInterpSingleStep(cUnit, mir);
1710 static bool handleFmt12x(CompilationUnit *cUnit, MIR *mir)
1712 OpCode opCode = mir->dalvikInsn.opCode;
1718 return genArithOp( cUnit, mir );
1721 if (mir->ssaRep->numUses == 2)
1722 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1724 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1725 if (mir->ssaRep->numDefs == 2)
1726 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
1728 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1741 return genConversion(cUnit, mir);
1744 return genArithOpInt(cUnit, mir, rlDest, rlSrc, rlSrc);
1747 return genArithOpLong(cUnit, mir, rlDest, rlSrc, rlSrc);
1749 return genArithOpFloat(cUnit, mir, rlDest, rlSrc, rlSrc);
1751 return genArithOpDouble(cUnit, mir, rlDest, rlSrc, rlSrc);
1798 mir->offset, NULL);
1811 static bool handleFmt21s(CompilationUnit *cUnit, MIR *mir)
1813 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
1816 int BBBB = mir->dalvikInsn.vB;
1818 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
1825 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1835 static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
1838 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
1840 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1946 static bool handleFmt22b_Fmt22s(CompilationUnit *cUnit, MIR *mir)
1948 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
1949 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1950 RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
1952 int lit = mir->dalvikInsn.vC;
2019 genInterpSingleStep(cUnit, mir);
2058 static bool handleFmt22c(CompilationUnit *cUnit, MIR *mir)
2060 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
2065 cUnit->method->clazz->pDvmDex->pResFields[mir->dalvikInsn.vC];
2076 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2077 RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
2080 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vC]);
2083 genExportPC(cUnit, mir);
2092 genRegImmCheck(cUnit, kArmCondMi, r1, 0, mir->offset, NULL);
2103 (int) (cUnit->method->insns + mir->offset));
2116 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2117 RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
2120 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vC]);
2131 genInterpSingleStep(cUnit, mir);
2162 genIGetWide(cUnit, mir, fieldOffset);
2166 genIGet(cUnit, mir, kWord, fieldOffset);
2169 genIGet(cUnit, mir, kUnsignedByte, fieldOffset);
2172 genIGet(cUnit, mir, kSignedByte, fieldOffset);
2175 genIGet(cUnit, mir, kUnsignedHalf, fieldOffset);
2178 genIGet(cUnit, mir, kSignedHalf, fieldOffset);
2181 genIPutWide(cUnit, mir, fieldOffset);
2185 genIPut(cUnit, mir, kWord, fieldOffset);
2189 genIPut(cUnit, mir, kUnsignedHalf, fieldOffset);
2193 genIPut(cUnit, mir, kUnsignedByte, fieldOffset);
2201 static bool handleFmt22cs(CompilationUnit *cUnit, MIR *mir)
2203 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
2204 int fieldOffset = mir->dalvikInsn.vC;
2208 genIGet(cUnit, mir, kWord, fieldOffset);
2212 genIPut(cUnit, mir, kWord, fieldOffset);
2215 genIGetWide(cUnit, mir, fieldOffset);
2218 genIPutWide(cUnit, mir, fieldOffset);
2228 static bool handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
2231 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
2233 RegLocation rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0);
2234 RegLocation rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 1);
2270 static bool handleFmt22x_Fmt32x(CompilationUnit *cUnit, MIR *mir)
2272 OpCode opCode = mir->dalvikInsn.opCode;
2279 storeValue(cUnit, dvmCompilerGetDest(cUnit, mir, 0),
2280 dvmCompilerGetSrc(cUnit, mir, 0));
2285 storeValueWide(cUnit, dvmCompilerGetDestWide(cUnit, mir, 0, 1),
2286 dvmCompilerGetSrcWide(cUnit, mir, 0, 1));
2295 static bool handleFmt23x(CompilationUnit *cUnit, MIR *mir)
2297 OpCode opCode = mir->dalvikInsn.opCode;
2303 return genArithOp( cUnit, mir );
2307 if (mir->ssaRep->numDefs == 0) {
2308 if (mir->ssaRep->numUses == 3) {
2309 rlDest = dvmCompilerGetSrc(cUnit, mir, 0);
2310 rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 1);
2311 rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 2);
2313 assert(mir->ssaRep->numUses == 4);
2314 rlDest = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
2315 rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 2);
2316 rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 3);
2320 if (mir->ssaRep->numUses == 4) {
2321 rlSrc1 = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
2322 rlSrc2 = dvmCompilerGetSrcWide(cUnit, mir, 2, 3);
2324 assert(mir->ssaRep->numUses == 2);
2325 rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0);
2326 rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 1);
2328 if (mir->ssaRep->numDefs == 2) {
2329 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
2331 assert(mir->ssaRep->numDefs == 1);
2332 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
2342 return genCmpFP(cUnit, mir, rlDest, rlSrc1, rlSrc2);
2344 genCmpLong(cUnit, mir, rlDest, rlSrc1, rlSrc2);
2347 genArrayGet(cUnit, mir, kLong, rlSrc1, rlSrc2, rlDest, 3);
2351 genArrayGet(cUnit, mir, kWord, rlSrc1, rlSrc2, rlDest, 2);
2354 genArrayGet(cUnit, mir, kUnsignedByte, rlSrc1, rlSrc2, rlDest, 0);
2357 genArrayGet(cUnit, mir, kSignedByte, rlSrc1, rlSrc2, rlDest, 0);
2360 genArrayGet(cUnit, mir, kUnsignedHalf, rlSrc1, rlSrc2, rlDest, 1);
2363 genArrayGet(cUnit, mir, kSignedHalf, rlSrc1, rlSrc2, rlDest, 1);
2366 genArrayPut(cUnit, mir, kLong, rlSrc1, rlSrc2, rlDest, 3);
2369 genArrayPut(cUnit, mir, kWord, rlSrc1, rlSrc2, rlDest, 2);
2372 genArrayObjectPut(cUnit, mir, rlSrc1, rlSrc2, rlDest, 2);
2376 genArrayPut(cUnit, mir, kUnsignedHalf, rlSrc1, rlSrc2, rlDest, 1);
2380 genArrayPut(cUnit, mir, kUnsignedByte, rlSrc1, rlSrc2, rlDest, 0);
2517 static bool handleFmt31t(CompilationUnit *cUnit, MIR *mir)
2519 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
2522 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2525 genExportPC(cUnit, mir);
2529 (int) (cUnit->method->insns + mir->offset + mir->dalvikInsn.vB));
2536 (int) (cUnit->method->insns + mir->offset));
2550 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2555 cUnit->method->insns + mir->offset + mir->dalvikInsn.vB;
2565 (int) (cUnit->method->insns + mir->offset + mir->dalvikInsn.vB));
2580 static bool handleFmt35c_3rc(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
2589 DecodedInstruction *dInsn = &mir->dalvikInsn;
2590 switch (mir->dalvikInsn.opCode) {
2603 if (mir->dalvikInsn.opCode == OP_INVOKE_VIRTUAL)
2604 genProcessArgsNoRange(cUnit, mir, dInsn, &pcrLabel);
2606 genProcessArgsRange(cUnit, mir, dInsn, &pcrLabel);
2608 genInvokeVirtualCommon(cUnit, mir, methodIndex,
2625 if (mir->dalvikInsn.opCode == OP_INVOKE_SUPER)
2626 genProcessArgsNoRange(cUnit, mir, dInsn, &pcrLabel);
2628 genProcessArgsRange(cUnit, mir, dInsn, &pcrLabel);
2633 genInvokeSingletonCommon(cUnit, mir, bb, labelList, pcrLabel,
2643 if (mir->dalvikInsn.opCode == OP_INVOKE_DIRECT)
2644 genProcessArgsNoRange(cUnit, mir, dInsn, &pcrLabel);
2646 genProcessArgsRange(cUnit, mir, dInsn, &pcrLabel);
2651 genInvokeSingletonCommon(cUnit, mir, bb, labelList, pcrLabel,
2661 if (mir->dalvikInsn.opCode == OP_INVOKE_STATIC)
2662 genProcessArgsNoRange(cUnit, mir, dInsn,
2665 genProcessArgsRange(cUnit, mir, dInsn,
2671 genInvokeSingletonCommon(cUnit, mir, bb, labelList, pcrLabel,
2754 if (mir->dalvikInsn.opCode == OP_INVOKE_INTERFACE)
2755 genProcessArgsNoRange(cUnit, mir, dInsn, &pcrLabel);
2757 genProcessArgsRange(cUnit, mir, dInsn, &pcrLabel);
2763 (int) (cUnit->method->insns + mir->offset));
2785 int dPC = (int) (cUnit->method->insns + mir->offset);
2789 pcrLabel->operands[1] = mir->offset;
2836 (int) (cUnit->method->insns + mir->offset));
2884 genTrap(cUnit, mir->offset, pcrLabel);
2894 genInterpSingleStep(cUnit, mir);
2903 static bool handleFmt35ms_3rms(CompilationUnit *cUnit, MIR *mir,
2910 DecodedInstruction *dInsn = &mir->dalvikInsn;
2911 switch (mir->dalvikInsn.opCode) {
2916 if (mir->dalvikInsn.opCode == OP_INVOKE_VIRTUAL_QUICK)
2917 genProcessArgsNoRange(cUnit, mir, dInsn, &pcrLabel);
2919 genProcessArgsRange(cUnit, mir, dInsn, &pcrLabel);
2921 genInvokeVirtualCommon(cUnit, mir, methodIndex,
2933 if (mir->dalvikInsn.opCode == OP_INVOKE_SUPER_QUICK)
2934 genProcessArgsNoRange(cUnit, mir, dInsn, &pcrLabel);
2936 genProcessArgsRange(cUnit, mir, dInsn, &pcrLabel);
2941 genInvokeSingletonCommon(cUnit, mir, bb, labelList, pcrLabel,
2944 genTrap(cUnit, mir->offset, pcrLabel);
2959 static bool genInlinedCompareTo(CompilationUnit *cUnit, MIR *mir)
2965 RegLocation rlThis = dvmCompilerGetSrc(cUnit, mir, 0);
2966 RegLocation rlComp = dvmCompilerGetSrc(cUnit, mir, 1);
2971 rollback = genNullCheck(cUnit, rlThis.sRegLow, r0, mir->offset, NULL);
2972 genNullCheck(cUnit, rlComp.sRegLow, r1, mir->offset, rollback);
2979 storeValue(cUnit, inlinedTarget(cUnit, mir, false),
2985 static bool genInlinedIndexOf(CompilationUnit *cUnit, MIR *mir, bool singleI)
2990 RegLocation rlThis = dvmCompilerGetSrc(cUnit, mir, 0);
2991 RegLocation rlChar = dvmCompilerGetSrc(cUnit, mir, 1);
2996 RegLocation rlStart = dvmCompilerGetSrc(cUnit, mir, 2);
3002 genNullCheck(cUnit, rlThis.sRegLow, r0, mir->offset, NULL);
3004 storeValue(cUnit, inlinedTarget(cUnit, mir, false),
3010 static bool genInlinedStringLength(CompilationUnit *cUnit, MIR *mir)
3012 RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 0);
3013 RegLocation rlDest = inlinedTarget(cUnit, mir, false);
3016 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, NULL);
3023 static bool genInlinedStringCharAt(CompilationUnit *cUnit, MIR *mir)
3026 RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 0);
3027 RegLocation rlIdx = dvmCompilerGetSrc(cUnit, mir, 1);
3028 RegLocation rlDest = inlinedTarget(cUnit, mir, false);
3036 mir->offset, NULL);
3040 genBoundsCheck(cUnit, rlIdx.lowReg, regMax, mir->offset, pcrLabel);
3050 static bool genInlinedAbsInt(CompilationUnit *cUnit, MIR *mir)
3052 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
3054 RegLocation rlDest = inlinedTarget(cUnit, mir, false);;
3069 static bool genInlinedAbsLong(CompilationUnit *cUnit, MIR *mir)
3071 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
3072 RegLocation rlDest = inlinedTargetWide(cUnit, mir, false);
3095 static bool handleExecuteInline(CompilationUnit *cUnit, MIR *mir)
3097 DecodedInstruction *dInsn = &mir->dalvikInsn;
3098 switch( mir->dalvikInsn.opCode) {
3111 return genInlinedStringLength(cUnit, mir);
3113 return genInlinedAbsInt(cUnit, mir);
3115 mir);
3117 return genInlinedMinMaxInt(cUnit, mir, true);
3119 return genInlinedMinMaxInt(cUnit, mir, false);
3121 return genInlinedStringCharAt(cUnit, mir);
3123 if (genInlineSqrt(cUnit, mir))
3128 if (genInlinedAbsFloat(cUnit, mir))
3133 if (genInlinedAbsDouble(cUnit, mir))
3138 if (genInlinedCompareTo(cUnit, mir))
3143 if (genInlinedIndexOf(cUnit, mir, true /* I */))
3148 if (genInlinedIndexOf(cUnit, mir, false /* I */))
3166 genExportPC(cUnit, mir);
3168 loadValueDirect(cUnit, dvmCompilerGetSrc(cUnit, mir, i), i);
3175 (int) (cUnit->method->insns + mir->offset));
3188 static bool handleFmt51l(CompilationUnit *cUnit, MIR *mir)
3191 RegLocation rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
3194 mir->dalvikInsn.vB_wide & 0xFFFFFFFFUL);
3196 (mir->dalvikInsn.vB_wide>>32) & 0xFFFFFFFFUL);
3326 static void genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir)
3334 DecodedInstruction *dInsn = &mir->dalvikInsn;
3339 RegLocation rlArray = cUnit->regLocation[mir->dalvikInsn.vA];
3340 RegLocation rlIdxEnd = cUnit->regLocation[mir->dalvikInsn.vC];
3380 static void genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir)
3382 DecodedInstruction *dInsn = &mir->dalvikInsn;
3387 RegLocation rlArray = cUnit->regLocation[mir->dalvikInsn.vA];
3388 RegLocation rlIdxInit = cUnit->regLocation[mir->dalvikInsn.vB];
3415 static void genHoistedLowerBoundCheck(CompilationUnit *cUnit, MIR *mir)
3417 DecodedInstruction *dInsn = &mir->dalvikInsn;
3419 RegLocation rlIdx = cUnit->regLocation[mir->dalvikInsn.vA];
3429 /* Extended MIR instructions like PHI */
3430 static void handleExtendedMIR(CompilationUnit *cUnit, MIR *mir)
3432 int opOffset = mir->dalvikInsn.opCode - kMirOpFirst;
3438 switch (mir->dalvikInsn.opCode) {
3440 char *ssaString = dvmCompilerGetSSAString(cUnit, mir->ssaRep);
3445 genHoistedChecksForCountUpLoop(cUnit, mir);
3449 genHoistedChecksForCountDownLoop(cUnit, mir);
3453 genHoistedLowerBoundCheck(cUnit, mir);
3503 static bool selfVerificationPuntOps(MIR *mir)
3505 DecodedInstruction *decInsn = &mir->dalvikInsn;
3576 MIR *mir;
3673 for (mir = blockList[i]->firstMIRInsn; mir; mir = mir->next) {
3684 if (mir->dalvikInsn.opCode >= kMirOpFirst) {
3685 handleExtendedMIR(cUnit, mir);
3690 OpCode dalvikOpCode = mir->dalvikInsn.opCode;
3695 mir->offset,
3696 (int) dvmCompilerGetDalvikDisassembly(&mir->dalvikInsn)
3698 if (mir->ssaRep) {
3699 char *ssaString = dvmCompilerGetSSAString(cUnit, mir->ssaRep);
3722 singleStepMe = selfVerificationPuntOps(mir);
3727 genInterpSingleStep(cUnit, mir);
3735 mir, blockList[i], labelList);
3738 notHandled = handleFmt10x(cUnit, mir);
3742 notHandled = handleFmt11n_Fmt31i(cUnit, mir);
3745 notHandled = handleFmt11x(cUnit, mir);
3748 notHandled = handleFmt12x(cUnit, mir);
3751 notHandled = handleFmt20bc(cUnit, mir);
3755 notHandled = handleFmt21c_Fmt31c(cUnit, mir);
3758 notHandled = handleFmt21h(cUnit, mir);
3761 notHandled = handleFmt21s(cUnit, mir);
3764 notHandled = handleFmt21t(cUnit, mir, blockList[i],
3769 notHandled = handleFmt22b_Fmt22s(cUnit, mir);
3772 notHandled = handleFmt22c(cUnit, mir);
3775 notHandled = handleFmt22cs(cUnit, mir);
3778 notHandled = handleFmt22t(cUnit, mir, blockList[i],
3783 notHandled = handleFmt22x_Fmt32x(cUnit, mir);
3786 notHandled = handleFmt23x(cUnit, mir);
3789 notHandled = handleFmt31t(cUnit, mir);
3793 notHandled = handleFmt35c_3rc(cUnit, mir, blockList[i],
3798 notHandled = handleFmt35ms_3rms(cUnit, mir,blockList[i],
3803 notHandled = handleExecuteInline(cUnit, mir);
3806 notHandled = handleFmt51l(cUnit, mir);
3815 mir->offset,
