Lines Matching refs:rlSrc
34 RegLocation rlSrc;
38 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
39 loadValueDirectFixed(cUnit, rlSrc, r0);
41 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
42 loadValueDirectWideFixed(cUnit, rlSrc, r0, r1);
266 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
270 rlSrc = loadValueWide(cUnit, rlSrc, kAnyReg);
277 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
316 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
319 rlSrc = loadValue(cUnit, rlSrc, kAnyReg);
325 storeBaseDisp(cUnit, rlObj.lowReg, fieldOffset, rlSrc.lowReg, size);
403 RegLocation rlSrc, int scale)
453 rlSrc = loadValueWide(cUnit, rlSrc, kAnyReg);
456 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
461 rlSrc = loadValue(cUnit, rlSrc, kAnyReg);
464 storeBaseIndexed(cUnit, regPtr, rlIndex.lowReg, rlSrc.lowReg,
477 RegLocation rlSrc, int scale)
513 loadValueDirectFixed(cUnit, rlSrc, r0);
539 loadValueDirectFixed(cUnit, rlSrc, r0);
1298 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1299 loadValueDirectFixed(cUnit, rlSrc, r1);
1301 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
1442 RegLocation rlSrc;
1517 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1518 rlSrc = loadValue(cUnit, rlSrc, kAnyReg);
1522 storeWordDisp(cUnit, tReg, 0 ,rlSrc.lowReg);
1534 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1535 rlSrc = loadValueWide(cUnit, rlSrc, kAnyReg);
1539 storePair(cUnit, tReg, rlSrc.lowReg, rlSrc.highReg);
1605 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1606 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1607 opRegImm(cUnit, kOpCmp, rlSrc.lowReg, 0); /* Null? */
1610 * rlSrc.lowReg now contains object->clazz. Note that
1616 loadWordDisp(cUnit, rlSrc.lowReg, offsetof(Object, clazz), r0);
1663 RegLocation rlSrc = LOC_DALVIK_RETURN_VAL;
1664 rlSrc.fp = rlDest.fp;
1665 storeValue(cUnit, rlDest, rlSrc);
1670 RegLocation rlSrc = LOC_DALVIK_RETURN_VAL_WIDE;
1671 rlSrc.fp = rlDest.fp;
1672 storeValueWide(cUnit, rlDest, rlSrc);
1676 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1678 rlDest.fp = rlSrc.fp;
1679 storeValueWide(cUnit, rlDest, rlSrc);
1685 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1687 rlDest.fp = rlSrc.fp;
1688 storeValue(cUnit, rlDest, rlSrc);
1714 RegLocation rlSrc;
1722 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1724 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1744 return genArithOpInt(cUnit, mir, rlDest, rlSrc, rlSrc);
1747 return genArithOpLong(cUnit, mir, rlDest, rlSrc, rlSrc);
1749 return genArithOpFloat(cUnit, mir, rlDest, rlSrc, rlSrc);
1751 return genArithOpDouble(cUnit, mir, rlDest, rlSrc, rlSrc);
1753 storeValueWide(cUnit, rlDest, rlSrc);
1756 rlSrc = dvmCompilerUpdateLoc(cUnit, rlSrc);
1759 if (rlSrc.location == kLocPhysReg) {
1760 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
1762 loadValueDirect(cUnit, rlSrc, rlResult.lowReg);
1769 rlSrc = dvmCompilerUpdateLocWide(cUnit, rlSrc);
1770 rlSrc = dvmCompilerWideToNarrow(cUnit, rlSrc);
1774 storeValue(cUnit, rlDest, rlSrc);
1777 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1779 opRegReg(cUnit, kOp2Byte, rlResult.lowReg, rlSrc.lowReg);
1783 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1785 opRegReg(cUnit, kOp2Short, rlResult.lowReg, rlSrc.lowReg);
1789 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1791 opRegReg(cUnit, kOp2Char, rlResult.lowReg, rlSrc.lowReg);
1796 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1797 rlSrc.sRegLow, rlSrc.lowReg,
1800 loadWordDisp(cUnit, rlSrc.lowReg, lenOffset,
1840 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1841 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1842 opRegImm(cUnit, kOpCmp, rlSrc.lowReg, 0);
1901 // Returns true if it added instructions to 'cUnit' to multiply 'rlSrc' by 'lit'
1904 RegLocation rlSrc, RegLocation rlDest, int lit)
1922 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1926 opRegRegImm(cUnit, kOpLsl, rlResult.lowReg, rlSrc.lowReg,
1932 genMultiplyByTwoBitMultiplier(cUnit, rlSrc, rlResult, lit,
1939 opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, lowestSetBit(lit + 1));
1940 opRegRegReg(cUnit, kOpSub, rlResult.lowReg, tReg, rlSrc.lowReg);
1949 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1962 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1967 tReg, rlSrc.lowReg);
1979 if (handleEasyMultiply(cUnit, rlSrc, rlDest, lit)) {
2023 loadValueDirectFixed(cUnit, rlSrc, r0);
2046 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2050 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
2052 opRegRegImm(cUnit, op, rlResult.lowReg, rlSrc.lowReg, lit);
2076 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2084 loadValueDirectFixed(cUnit, rlSrc, r1); /* Len */
2116 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2135 loadValueDirectFixed(cUnit, rlSrc, r0); /* Ref */
2522 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2526 loadValueDirectFixed(cUnit, rlSrc, r0);
2550 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2552 loadValueDirectFixed(cUnit, rlSrc, r1);
3052 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
3053 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
3062 opRegRegImm(cUnit, kOpAsr, signReg, rlSrc.lowReg, 31);
3063 opRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, signReg);
3071 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
3073 rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
3082 opRegRegImm(cUnit, kOpAsr, signReg, rlSrc.highReg, 31);
3083 opRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, signReg);
3084 opRegRegReg(cUnit, kOpAdc, rlResult.highReg, rlSrc.highReg, signReg);
