Lines Matching full:reset
61 #define EDLC_RESET (ioaddr + 0x06) /* EDLC RESET register */
71 #define IE_DMA_RST (ioaddr + 0x13) /* IE DMA Reset. write only */
76 #define IE_RESET (ioaddr + 0x17) /* any write causes Board Reset */
105 #define RS_RST_PKT 0x10 /* RESET packet received */
114 #define RS_CLR_RST_PKT 0x10 /* clear RESET packet received */
122 #define RM_RST_PKT 0x10 /* =1 to enable RESET packet ints */
132 #define RMD_EN_RST 0x04 /* =1 to rcv RESET pkt. normally 0 */
147 #define RS_RESET 0x80 /* =1 to hold EDLC in reset state */
193 RESET - Reset adapter
199 /* Reset the hardware here. Don't forget to set the station address. */
201 outb(0, IE_RESET); /* Hardware reset of ni5010 board */
215 outb(0x00, EDLC_RESET); /* Un-reset the ni5010 */
366 nic->reset = ni5010_reset;
