Home | History | Annotate | Download | only in asm-arm

Lines Matching full:cache

22  *	Cache Model
90 #error Unknown cache maintainence model
100 * MM Cache Management
103 * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files
111 * effects are cache-type (VIVT/VIPT/PIPT) specific.
115 * Unconditionally clean and invalidate the entire cache.
119 * Clean and invalidate all user space cache entries
124 * Clean and invalidate a range of cache entries in the
138 * DMA Cache Coherency
145 * are not cache line aligned, those lines must be written
193 * Their sole purpose is to ensure that data held in the cache
219 * Their sole purpose is to ensure that data held in the cache
237 * to do a full cache flush to ensure that writebacks don't corrupt
315 * Perform necessary cache operations to ensure that data previously
321 * Perform necessary cache operations to ensure that the TLB will
328 * cache page at virtual address page->virtual.
334 * Otherwise we can defer the operation, and clean the cache when we are
350 * duplicate cache flushing elsewhere performed by flush_dcache_page().