Lines Matching full:zsig
225 | Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
228 | together to form the result. This means that any integer portion of `zSig'
231 | than the desired result exponent whenever `zSig' is a complete, normalized
235 INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
239 ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig);
245 | and significand `zSig', and returns the proper single-precision floating-
255 | The input significand `zSig' has its binary point between bits 30
257 | significand must be normalized or smaller. If `zSig' is not normalized,
259 | and it must not require rounding. In the usual case that `zSig' is
265 static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM)
289 roundBits = zSig & 0x7F;
293 && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
303 || ( zSig + roundIncrement < 0x80000000 );
304 shift32RightJamming( zSig, - zExp, &zSig );
306 roundBits = zSig & 0x7F;
311 zSig = ( zSig + roundIncrement )>>7;
312 zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
313 if ( zSig == 0 ) zExp = 0;
314 return packFloat32( zSign, zExp, zSig );
320 | and significand `zSig', and returns the proper single-precision floating-
322 | `roundAndPackFloat32' except that `zSig' does not have to be normalized.
323 | Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
328 normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM)
332 shiftCount = countLeadingZeros32( zSig ) - 1;
333 return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR);
389 | Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
392 | together to form the result. This means that any integer portion of `zSig'
395 | than the desired result exponent whenever `zSig' is a complete, normalized
399 INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
403 ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig);
409 | and significand `zSig', and returns the proper double-precision floating-
419 | The input significand `zSig' has its binary point between bits 62
421 | significand must be normalized or smaller. If `zSig' is not normalized,
423 | and it must not require rounding. In the usual case that `zSig' is
429 static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM)
453 roundBits = zSig & 0x3FF;
457 && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
467 || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
468 shift64RightJamming( zSig, - zExp, &zSig );
470 roundBits = zSig & 0x3FF;
475 zSig = ( zSig + roundIncrement )>>10;
476 zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
477 if ( zSig == 0 ) zExp = 0;
478 return packFloat64( zSign, zExp, zSig );
484 | and significand `zSig', and returns the proper double-precision floating-
486 | `roundAndPackFloat64' except that `zSig' does not have to be normalized.
487 | Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
492 normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM)
496 shiftCount = countLeadingZeros64( zSig ) - 1;
497 return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR);
558 | Packs the sign `zSign', exponent `zExp', and significand `zSig' into an
562 INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
566 z.low = zSig;
1079 bits64 zSig;
1085 zSig = absA;
1086 return packFloat64( zSign, 0x432 - shiftCount, zSig<<shiftCount );
1104 bits64 zSig;
1110 zSig = absA;
1111 return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );
1603 bits32 aSig, bSig, zSig;
1650 zSig = 0x40000000 + aSig + bSig;
1655 zSig = ( aSig + bSig )<<1;
1657 if ( (sbits32) zSig < 0 ) {
1658 zSig = aSig + bSig;
1662 return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR );
1677 bits32 aSig, bSig, zSig;
1715 zSig = bSig - aSig;
1733 zSig = aSig - bSig;
1737 return normalizeRoundAndPackFloat32( zSign, zExp, zSig STATUS_VAR );
1795 bits32 zSig;
1834 zSig = zSig64;
1835 if ( 0 <= (sbits32) ( zSig<<1 ) ) {
1836 zSig <<= 1;
1839 return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR );
1853 bits32 aSig, bSig, zSig;
1897 zSig = ( ( (bits64) aSig )<<32 ) / bSig;
1898 if ( ( zSig & 0x3F ) == 0 ) {
1899 zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
1901 return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR );
2015 bits32 aSig, zSig;
2038 zSig = estimateSqrt32( aExp, aSig ) + 2;
2039 if ( ( zSig & 0x7F ) <= 5 ) {
2040 if ( zSig < 2 ) {
2041 zSig = 0x7FFFFFFF;
2045 term = ( (bits64) zSig ) * zSig;
2048 --zSig;
2049 rem += ( ( (bits64) zSig )<<1 ) | 1;
2051 zSig |= ( rem != 0 );
2053 shift32RightJamming( zSig, 1, &zSig );
2055 return roundAndPackFloat32( 0, zExp, zSig STATUS_VAR );
2068 bits32 aSig, zSig, i;
2090 zSig = aExp << 23;
2096 zSig |= i;
2101 zSig = -zSig;
2103 return normalizeRoundAndPackFloat32( zSign, 0x85, zSig STATUS_VAR );
2441 bits32 zSig;
2451 zSig = aSig;
2452 if ( aExp || zSig ) {
2453 zSig |= 0x40000000;
2456 return roundAndPackFloat32( aSign, aExp, zSig STATUS_VAR );
2611 bits64 aSig, bSig, zSig;
2658 zSig = LIT64( 0x4000000000000000 ) + aSig + bSig;
2663 zSig = ( aSig + bSig )<<1;
2665 if ( (sbits64) zSig < 0 ) {
2666 zSig = aSig + bSig;
2670 return roundAndPackFloat64( zSign, zExp, zSig STATUS_VAR );
2685 bits64 aSig, bSig, zSig;
2723 zSig = bSig - aSig;
2741 zSig = aSig - bSig;
2745 return normalizeRoundAndPackFloat64( zSign, zExp, zSig STATUS_VAR );
2859 bits64 aSig, bSig, zSig;
2905 zSig = estimateDiv128To64( aSig, 0, bSig );
2906 if ( ( zSig & 0x1FF ) <= 2 ) {
2907 mul64To128( bSig, zSig, &term0, &term1 );
2910 --zSig;
2913 zSig |= ( rem1 != 0 );
2915 return roundAndPackFloat64( zSign, zExp, zSig STATUS_VAR );
3014 bits64 aSig, zSig, doubleZSig;
3037 zSig = estimateSqrt32( aExp, aSig>>21 );
3039 zSig = estimateDiv128To64( aSig, 0, zSig<<32 ) + ( zSig<<30 );
3040 if ( ( zSig & 0x1FF ) <= 5 ) {
3041 doubleZSig = zSig<<1;
3042 mul64To128( zSig, zSig, &term0, &term1 );
3045 --zSig;
3047 add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
3049 zSig |= ( ( rem0 | rem1 ) != 0 );
3051 return roundAndPackFloat64( 0, zExp, zSig STATUS_VAR );
3064 bits64 aSig, aSig0, aSig1, zSig, i;
3086 zSig = (bits64)aExp << 52;
3092 zSig |= i;
3097 zSig = -zSig;
3098 return normalizeRoundAndPackFloat64( zSign, 0x408, zSig STATUS_VAR );
3456 bits64 aSig, zSig;
3467 shift64RightJamming( aSig, 1, &zSig );
3469 return roundAndPackFloat64( aSign, aExp, zSig STATUS_VAR );
4448 bits32 zSig;
4462 zSig = aSig0;
4463 if ( aExp || zSig ) {
4464 zSig |= 0x40000000;
4467 return roundAndPackFloat32( aSign, aExp, zSig STATUS_VAR );
