Lines Matching full:case
474 Conveniently, these also handle the case where the buffer is mis-aligned.
538 case 0: GET_REGL(env->eip);
539 case 1: GET_REG32(env->eflags);
540 case 2: GET_REG32(env->segs[R_CS].selector);
541 case 3: GET_REG32(env->segs[R_SS].selector);
542 case 4: GET_REG32(env->segs[R_DS].selector);
543 case 5: GET_REG32(env->segs[R_ES].selector);
544 case 6: GET_REG32(env->segs[R_FS].selector);
545 case 7: GET_REG32(env->segs[R_GS].selector);
547 case 16: GET_REG32(env->fpuc);
548 case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
549 case 18: GET_REG32(0); /* ftag */
550 case 19: GET_REG32(0); /* fiseg */
551 case 20: GET_REG32(0); /* fioff */
552 case 21: GET_REG32(0); /* foseg */
553 case 22: GET_REG32(0); /* fooff */
554 case 23: GET_REG32(0); /* fop */
587 case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
588 case 1: env->eflags = ldl_p(mem_buf); return 4;
599 case 2: LOAD_SEG(10, R_CS); return 4;
600 case 3: LOAD_SEG(11, R_SS); return 4;
601 case 4: LOAD_SEG(12, R_DS); return 4;
602 case 5: LOAD_SEG(13, R_ES); return 4;
603 case 6: LOAD_SEG(14, R_FS); return 4;
604 case 7: LOAD_SEG(15, R_GS); return 4;
606 case 16: env->fpuc = ldl_p(mem_buf); return 4;
607 case 17:
612 case 18: /* ftag */ return 4;
613 case 19: /* fiseg */ return 4;
614 case 20: /* fioff */ return 4;
615 case 21: /* foseg */ return 4;
616 case 22: /* fooff */ return 4;
617 case 23: /* fop */ return 4;
652 case 64: GET_REGL(env->nip);
653 case 65: GET_REGL(env->msr);
654 case 66:
662 case 67: GET_REGL(env->lr);
663 case 68: GET_REGL(env->ctr);
664 case 69: GET_REGL(env->xer);
665 case 70:
690 case 64:
693 case 65:
696 case 66:
704 case 67:
707 case 68:
710 case 69:
713 case 70:
754 case 64: GET_REGA(env->y);
755 case 65: GET_REGA(GET_PSR(env));
756 case 66: GET_REGA(env->wim);
757 case 67: GET_REGA(env->tbr);
758 case 68: GET_REGA(env->pc);
759 case 69: GET_REGA(env->npc);
760 case 70: GET_REGA(env->fsr);
761 case 71: GET_REGA(0); /* csr */
778 case 80: GET_REGL(env->pc);
779 case 81: GET_REGL(env->npc);
780 case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
784 case 83: GET_REGL(env->fsr);
785 case 84: GET_REGL(env->fprs);
786 case 85: GET_REGL(env->y);
818 case 64: env->y = tmp; break;
819 case 65: PUT_PSR(env, tmp); break;
820 case 66: env->wim = tmp; break;
821 case 67: env->tbr = tmp; break;
822 case 68: env->pc = tmp; break;
823 case 69: env->npc = tmp; break;
824 case 70: env->fsr = tmp; break;
840 case 80: env->pc = tmp; break;
841 case 81: env->npc = tmp; break;
842 case 82:
848 case 83: env->fsr = tmp; break;
849 case 84: env->fprs = tmp; break;
850 case 85: env->y = tmp; break;
881 case 24:
886 case 25:
917 case 24:
922 case 25:
947 case 16: GET_REG32(env->sr);
948 case 17: GET_REG32(env->pc);
970 case 16: env->sr = tmp; break;
971 case 17: env->pc = tmp; break;
994 case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
995 case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
999 case 32: GET_REGL((int32_t)env->CP0_Status);
1000 case 33: GET_REGL(env->active_tc.LO[0]);
1001 case 34: GET_REGL(env->active_tc.HI[0]);
1002 case 35: GET_REGL(env->CP0_BadVAddr);
1003 case 36: GET_REGL((int32_t)env->CP0_Cause);
1004 case 37: GET_REGL(env->active_tc.PC);
1005 case 72: GET_REGL(0); /* fp */
1006 case 89: GET_REGL((int32_t)env->CP0_PRid);
1046 case 70:
1055 case 71: env->active_fpu.fcr0 = tmp; break;
1060 case 32: env->CP0_Status = tmp; break;
1061 case 33: env->active_tc.LO[0] = tmp; break;
1062 case 34: env->active_tc.HI[0] = tmp; break;
1063 case 35: env->CP0_BadVAddr = tmp; break;
1064 case 36: env->CP0_Cause = tmp; break;
1065 case 37: env->active_tc.PC = tmp; break;
1066 case 72: /* fp, ignored */ break;
1101 case 16: GET_REGL(env->pc);
1102 case 17: GET_REGL(env->pr);
1103 case 18: GET_REGL(env->gbr);
1104 case 19: GET_REGL(env->vbr);
1105 case 20: GET_REGL(env->mach);
1106 case 21: GET_REGL(env->macl);
1107 case 22: GET_REGL(env->sr);
1108 case 23: GET_REGL(env->fpul);
1109 case 24: GET_REGL(env->fpscr);
1110 case 41: GET_REGL(env->ssr);
1111 case 42: GET_REGL(env->spc);
1143 case 16: env->pc = tmp;
1144 case 17: env->pr = tmp;
1145 case 18: env->gbr = tmp;
1146 case 19: env->vbr = tmp;
1147 case 20: env->mach = tmp;
1148 case 21: env->macl = tmp;
1149 case 22: env->sr = tmp;
1150 case 23: env->fpul = tmp;
1151 case 24: env->fpscr = tmp;
1152 case 41: env->ssr = tmp;
1153 case 42: env->spc = tmp;
1209 case 16: GET_REG8(env->pregs[0]);
1210 case 17: GET_REG8(env->pregs[1]);
1211 case 18: GET_REG32(env->pregs[2]);
1212 case 19: GET_REG8(srs);
1213 case 20: GET_REG16(env->pregs[4]);
1214 case 32: GET_REG32(env->pc);
1239 case 16: return 1;
1240 case 17: return 1;
1241 case 18: env->pregs[PR_PID] = tmp; break;
1242 case 19: return 1;
1243 case 20: return 2;
1244 case 32: env->pc = tmp; break;
1327 case '#': case '$': case '*': case '}':
1470 case GDB_BREAKPOINT_SW:
1471 case GDB_BREAKPOINT_HW:
1479 case GDB_WATCHPOINT_WRITE:
1480 case GDB_WATCHPOINT_READ:
1481 case GDB_WATCHPOINT_ACCESS:
1504 case GDB_BREAKPOINT_SW:
1505 case GDB_BREAKPOINT_HW:
1513 case GDB_WATCHPOINT_WRITE:
1514 case GDB_WATCHPOINT_READ:
1515 case GDB_WATCHPOINT_ACCESS:
1609 case '?':
1620 case 'c':
1628 case 'C':
1634 case 'k':
1638 case 'D':
1644 case 's':
1652 case 'F':
1676 case 'g':
1686 case 'G':
1698 case 'm':
1710 case 'M':
1723 case 'p':
1738 case 'P':
1749 case 'Z':
1750 case 'z':
1769 case 'H':
1782 case 'c':
1786 case 'g':
1795 case 'T':
1805 case 'q':
1806 case 'Q':
1975 case BP_MEM_READ:
1978 case BP_MEM_ACCESS:
2033 case 'x':
2037 case 'l':
2043 case 's':
2102 case RS_IDLE:
2108 case RS_GETLINE:
2117 case RS_CHKSUM1:
2122 case RS_CHKSUM2:
2340 case CHR_EVENT_RESET:
