Lines Matching refs:offset
248 static void smc91c111_writeb(void *opaque, target_phys_addr_t offset,
253 if (offset == 14) {
257 if (offset == 15)
261 switch (offset) {
283 switch (offset) {
315 switch (offset) {
382 p += (offset & 3);
401 switch (offset) {
417 hw_error("smc91c111_write: Bad reg %d:%x\n", s->bank, (int)offset);
420 static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset)
424 if (offset == 14) {
427 if (offset == 15)
431 switch (offset) {
468 switch (offset) {
477 return s->macaddr[offset - 4];
490 switch (offset) {
524 p += (offset & 3);
536 switch (offset) {
557 hw_error("smc91c111_read: Bad reg %d:%x\n", s->bank, (int)offset);
561 static void smc91c111_writew(void *opaque, target_phys_addr_t offset,
564 smc91c111_writeb(opaque, offset, value & 0xff);
565 smc91c111_writeb(opaque, offset + 1, value >> 8);
568 static void smc91c111_writel(void *opaque, target_phys_addr_t offset,
571 /* 32-bit writes to offset 0xc only actually write to the bank select
572 register (offset 0xe) */
573 if (offset != 0xc)
574 smc91c111_writew(opaque, offset, value & 0xffff);
575 smc91c111_writew(opaque, offset + 2, value >> 16);
578 static uint32_t smc91c111_readw(void *opaque, target_phys_addr_t offset)
581 val = smc91c111_readb(opaque, offset);
582 val |= smc91c111_readb(opaque, offset + 1) << 8;
586 static uint32_t smc91c111_readl(void *opaque, target_phys_addr_t offset)
589 val = smc91c111_readw(opaque, offset);
590 val |= smc91c111_readw(opaque, offset + 2) << 16;
