Lines Matching full:load
3037 /* Load the initial operands. */
3340 /* Load/store */
3352 /* Single load/store */
3365 /* load/store multiple */
3380 /* load */
3727 /* Translate a NEON load/store element instruction. Return nonzero if the
3739 int load;
3750 load = (insn & (1 << 21)) != 0;
3752 /* Load store all elements. */
3771 if (load) {
3780 if (load) {
3798 if (load) {
3833 /* Load single element to all lanes. */
3834 if (!load)
3888 if (load) {
5719 /* load a 32-bit value from a register and perform a 64-bit accumulate. */
5725 /* Load value and extend to 64 bits. */
5733 /* load and add a 64-bit value from a register pair. */
5740 /* Load 64-bit value rd:rn. */
5856 /* NEON load/store. */
5955 /* Load PC into tmp and CPSR into tmp2. */
6405 /* multiplies, extra load/stores */
6461 /* load/store exclusive */
6543 int load;
6544 /* Misc load/store */
6552 /* load */
6565 load = 1;
6575 load = 0;
6577 /* load */
6583 load = 1;
6590 load = 0;
6606 if (load) {
6607 /* Complete the load. */
6867 /* load/store byte/word */
6875 /* load */
6898 /* Complete the load. */
6910 /* load/store multiple words */
6953 /* load */
7229 /* Other load/store, table branch. */
7231 /* Load/store doubleword. */
7270 /* Load/store exclusive word. */
7311 /* Load/store exclusive byte/halfword/doubleword. */
7366 /* Load/store multiple, RFE, SRS. */
7376 /* Load PC into tmp and CPSR into tmp2. */
7428 /* Load/store multiple. */
7443 /* Load. */
8056 case 12: /* Load/store single data item. */
8125 /* Load. */
8293 /* load pc-relative. Bit 1 of PC is ignored. */
8464 /* load/store register offset. */
8503 if (op >= 3) /* load */
8509 /* load/store word immediate offset */
8517 /* load */
8529 /* load/store byte immediate offset */
8537 /* load */
8549 /* load/store halfword immediate offset */
8557 /* load */
8569 /* load/store from stack */
8576 /* load */
8766 /* load/store multiple */
8772 /* load */
