Lines Matching full:pass
1205 static TCGv neon_load_reg(int reg, int pass)
1208 tcg_gen_ld_i32(tmp, cpu_env, neon_reg_offset(reg, pass));
1212 static void neon_store_reg(int reg, int pass, TCGv var)
1214 tcg_gen_st_i32(var, cpu_env, neon_reg_offset(reg, pass));
2780 int pass;
2789 pass = (insn >> 21) & 1;
2802 tmp = neon_load_reg(rn, pass);
2841 for (n = 0; n <= pass * 2; n++) {
2851 tmp2 = neon_load_reg(rn, pass);
2856 tmp2 = neon_load_reg(rn, pass);
2863 neon_store_reg(rn, pass, tmp);
3738 int pass;
3769 for (pass = 0; pass < 2; pass++) {
3773 neon_store_reg(rd, pass, tmp);
3775 tmp = neon_load_reg(rd, pass);
3787 neon_store_reg(rd, pass, tmp);
3789 tmp = neon_load_reg(rd, pass);
3810 neon_store_reg(rd, pass, tmp2);
3812 tmp2 = neon_load_reg(rd, pass);
3868 pass = (insn >> 7) & 1;
3903 tmp2 = neon_load_reg(rd, pass);
3907 neon_store_reg(rd, pass, tmp);
3909 tmp = neon_load_reg(rd, pass);
4115 int pass;
4140 for (pass = 0; pass < (q ? 2 : 1); pass++) {
4141 neon_load_reg64(cpu_V0, rn + pass);
4142 neon_load_reg64(cpu_V1, rm + pass);
4200 neon_store_reg64(cpu_V0, rd + pass);
4233 for (pass = 0; pass < (q ? 4 : 2); pass++) {
4238 n = (pass & 1) * 2;
4241 if (pass < q + 1) {
4250 NEON_GET_REG(T0, rn, pass);
4251 NEON_GET_REG(T1, rm, pass);
4282 tmp = neon_load_reg(rd, pass);
4287 tmp = neon_load_reg(rd, pass);
4292 tmp = neon_load_reg(rd, pass);
4333 NEON_GET_REG(T1, rd, pass);
4373 NEON_GET_REG(T1, rd, pass);
4444 NEON_GET_REG(T1, rd, pass);
4489 gen_neon_movl_scratch_T0(pass);
4491 NEON_SET_REG(T0, rd, pass);
4494 } /* for pass */
4496 for (pass = 0; pass < (q ? 4 : 2); pass++) {
4497 gen_neon_movl_T0_scratch(pass);
4498 NEON_SET_REG(T0, rd, pass);
4547 for (pass = 0; pass < count; pass++) {
4549 neon_load_reg64(cpu_V0, rm + pass);
4586 neon_load_reg64(cpu_V0, rd + pass);
4592 neon_store_reg64(cpu_V0, rd + pass);
4596 NEON_GET_REG(T0, rm, pass);
4634 NEON_GET_REG(T1, rd, pass);
4663 tmp = neon_load_reg(rd, pass);
4668 NEON_SET_REG(T0, rd, pass);
4670 } /* for pass */
4696 for (pass = 0; pass < 2; pass++) {
4698 neon_load_reg64(cpu_V0, rm + pass);
4711 tmp = neon_load_reg(rm + pass, 0);
4713 tmp3 = neon_load_reg(rm + pass, 1);
4728 if (pass == 0) {
4734 } /* for pass */
4741 for (pass = 0; pass < 2; pass++) {
4742 if (pass == 1)
4763 neon_store_reg64(cpu_V0, rd + pass);
4767 for (pass = 0; pass < (q ? 4 : 2); pass++) {
4768 tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, pass));
4780 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, pass));
4833 for (pass = 0; pass < (q ? 4 : 2); pass++) {
4835 tmp = neon_load_reg(rd, pass);
4850 if (imm & (1 << (n + (pass & 1) * 4)))
4858 neon_store_reg(rd, pass, tmp);
4906 for (pass = 0; pass < 2; pass++) {
4908 neon_load_reg64(cpu_V0, rn + pass);
4911 if (pass == 1 && rd == rn) {
4916 tmp = neon_load_reg(rn, pass);
4923 neon_load_reg64(cpu_V1, rm + pass);
4926 if (pass == 1 && rd == rm) {
4931 tmp2 = neon_load_reg(rm, pass);
4986 neon_load_reg64(cpu_V1, rd + pass);
5004 neon_store_reg64(cpu_V0, rd + pass);
5038 if (pass == 0) {
5046 neon_store_reg64(cpu_V0, rd + pass);
5062 for (pass = 0; pass < (u ? 4 : 2); pass++) {
5063 if (pass != 0)
5065 NEON_GET_REG(T1, rn, pass);
5090 NEON_GET_REG(T1, rd, pass);
5108 NEON_SET_REG(T0, rd, pass);
5123 for (pass = 0; pass < 2; pass++) {
5124 if (pass == 0) {
5137 neon_load_reg64(cpu_V1, rd + pass);
5156 neon_store_reg64(cpu_V0, rd + pass);
5223 for (pass = 0; pass < (q ? 2 : 1); pass++) {
5224 NEON_GET_REG(T0, rm, pass * 2);
5225 NEON_GET_REG(T1, rm, pass * 2 + 1);
5232 NEON_SET_REG(T0, rd, pass * 2 + 1);
5234 NEON_SET_REG(T1, rd, pass * 2);
5242 NEON_SET_REG(T0, rd, pass * 2);
5250 for (pass = 0; pass < q + 1; pass++) {
5251 tmp = neon_load_reg(rm, pass * 2);
5253 tmp = neon_load_reg(rm, pass * 2 + 1);
5263 neon_load_reg64(cpu_V1, rd + pass);
5266 neon_store_reg64(cpu_V0, rd + pass);
5338 for (pass = 0; pass < 2; pass++) {
5339 neon_load_reg64(cpu_V0, rm + pass);
5348 if (pass == 0) {
5361 for (pass = 0; pass < 2; pass++) {
5362 if (pass == 1)
5365 neon_store_reg64(cpu_V0, rd + pass);
5370 for (pass = 0; pass < (q ? 4 : 2); pass++) {
5373 neon_reg_offset(rm, pass));
5375 NEON_GET_REG(T0, rm, pass);
5500 NEON_GET_REG(T1, rd, pass);
5501 NEON_SET_REG(T1, rm, pass);
5504 NEON_GET_REG(T1, rd, pass);
5511 NEON_SET_REG(T1, rm, pass);
5543 neon_reg_offset(rd, pass));
5545 NEON_SET_REG(T0, rd, pass);
5590 for (pass = 0; pass < (q ? 4 : 2); pass++) {
5591 NEON_SET_REG(T0, rd, pass);
