Lines Matching refs:code
8 // - Redistributions of source code must retain the above copyright notice,
31 // The original source code covered by the above license above has been
153 return kNumbers[reg.code()];
181 // Patch the code at the current address with the supplied instructions.
189 // Indicate that code has changed.
194 // Patch the code at the current PC with a call to the target address.
197 // Patch the code at the current address with a call to the target.
208 // Verify all Objects referred by code are NOT in new space.
283 // Setup code descriptor.
291 // Labels refer to positions in the (to be) generated code.
295 // generated code. pos() is the position the label refers to.
297 // Linked labels refer to unknown positions in the code
302 // The link chain is terminated by a negative code position (must be aligned).
328 return instr - (Code::kHeaderSize - kHeapObjectTag);
346 // Make label relative to Code* of generated Code object.
347 instr_at_put(pos, target_pos + (Code::kHeaderSize - kHeapObjectTag));
463 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
464 | (rd.code() << kRdShift) | (sa << kSaShift) | func;
476 Instr instr = opcode | fmt | (ft.code() << 16) | (fs.code() << kFsShift)
477 | (fd.code() << 6) | func;
489 Instr instr = opcode | fmt | (rt.code() << kRtShift)
490 | (fs.code() << kFsShift) | (fd.code() << 6) | func;
502 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
513 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
523 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
567 instr_at_put(at_offset, target_pos + (Code::kHeaderSize - kHeapObjectTag));
808 void Assembler::break_(uint32_t code) {
809 ASSERT((code & ~0xfffff) == 0);
810 Instr break_instr = SPECIAL | BREAK | (code << 6);
815 void Assembler::tge(Register rs, Register rt, uint16_t code) {
816 ASSERT(is_uint10(code));
817 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
818 | rt.code() << kRtShift | code << 6;
823 void Assembler::tgeu(Register rs, Register rt, uint16_t code) {
824 ASSERT(is_uint10(code));
825 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
826 | rt.code() << kRtShift | code << 6;
831 void Assembler::tlt(Register rs, Register rt, uint16_t code) {
832 ASSERT(is_uint10(code));
834 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
839 void Assembler::tltu(Register rs, Register rt, uint16_t code) {
840 ASSERT(is_uint10(code));
841 Instr instr = SPECIAL | TLTU | rs.code() << kRsShift
842 | rt.code() << kRtShift | code << 6;
847 void Assembler::teq(Register rs, Register rt, uint16_t code) {
848 ASSERT(is_uint10(code));
850 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
855 void Assembler::tne(Register rs, Register rt, uint16_t code) {
856 ASSERT(is_uint10(code));
858 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
996 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift
1067 if (!own_buffer_) FATAL("external code buffer is too small");
1113 // Adjust code for new modes.
1162 // On MIPS we need to patch the code to generate.
